Browse Patents by Publication Date

Publication Number Title
US10061562 Random number generator in a parallel processing database
US10061563 Hardware non-deterministic random byte generator
US10061564 Injecting CPU time jitter to improve entropy quality for random number generator
US10061565 Application development using mutliple primary user interfaces
US10061566 Methods and systems to identify log write instructions of a source code as sources of event messages
US10061567 Multi-sized data types for managed code
US10061568 Dynamic alias checking with transactional memory
US10061569 Method and apparatus for solving a mixed integer programming problem
US10061570 Per tenant initialization check removal
US10061571 System and method for link time optimization
US10061572 Reconfiguration of address space based on loading short pointer mode application
US10061573 User interfaces of application porting software platform
US10061574 Method and apparatus for multiple vehicle software module reflash
US10061575 Managed execution environment for software application interfacing
US10061576 Vehicle-mounted program writing device
US10061577 System and method for optimizing job scheduling within program builds
US10061578 System and method of configuring a data store for tracking and auditing real-time events across different software development tools in agile development environments
US10061579 Distributed double-precision floating-point addition
US10061580 Implementing a received add program counter immediate shift (ADDPCIS) instruction using a micro-coded or cracked sequence
US10061581 On-the-fly conversion during load/store operations in a vector processor
US10061582 Method for increasing the speed of speculative execution
US10061583 Systems, apparatuses, and methods for data speculation execution
US10061584 Store nullification in the target field
US10061586 Latent modification instruction for transactional execution
US10061587 Instruction and logic for bulk register reclamation
US10061589 Systems, apparatuses, and methods for data speculation execution
US10061590 Generating and executing a control flow
US10061591 Redundancy elimination in single instruction multiple data/thread (SIMD/T) execution processing
US10061592 Architecture and execution for efficient mixed precision computations in single instruction multiple data/thread (SIMD/T) devices
US10061593 Processor having multiple cores, shared core extension logic, and shared core extension utilization instructions
US10061594 Protecting and verifying contents of files on mobile computing devices
US10061595 Fast computer startup
US10061596 Systems and methods for loading firmware modules
US10061597 Computing device with first and second operating systems
US10061598 Generation of usage tips
US10061599 Bus enumeration acceleration
US10061600 Ascertaining configuration of a virtual adapter in a computing environment
US10061602 System and method for providing a virtual assembly builder for use with a cloud computing environment
US10061603 Method and apparatus for dynamic routing of user contexts
US10061604 Program execution recording and playback
US10061605 Extending server-based desktop virtual machine architecture to client machines
US10061606 Systems and methods of secure domain isolation involving separation kernel features
US10061607 System and method for providing single group multiple branches based on instance awareness
US10061609 Method and system using exceptions for code specialization in a computer architecture that supports transactions
US10061610 CPU scheduler configured to support latency sensitive virtual machines
US10061611 Virtual machine migration within a hybrid cloud system
US10061612 Job scheduler for remote maintenance of servers and workstations
US10061613 Idempotent task execution in on-demand network code execution systems
US10061614 Resource management for untrusted programs
US10061615 Application load adaptive multi-stage parallel data processing architecture
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