Browse Patents by Publication Date

Publication Number Title
US10163743 Copper flanged air cavity packages for high frequency devices
US10163744 Semiconductor device and method of forming a low profile dual-purpose shield and heat-dissipation structure
US10163745 Package with tilted interface between device die and encapsulating material
US10163746 Semiconductor package with improved signal stability and method of manufacturing the same
US10163747 Semiconductor device and method of controlling warpage in reconstituted wafer
US10163748 Methods of manufacturing a printed circuit module having a semiconductor device with a protective layer in place of a low-resistivity handle layer
US10163749 Semiconductor device and method of manufacturing the same
US10163750 Package structure for heat dissipation
US10163751 Heat transfer structures and methods for IC packages
US10163752 Semiconductor device
US10163753 Method for forming interconnect structure of semiconductor device
US10163754 Lid design for heat dissipation enhancement of die package
US10163755 Methods of manufacturing stacked semiconductor die assemblies with high efficiency thermal paths
US10163756 Isolation structure for stacked dies
US10163757 Method and structures for via substrate repair and assembly
US10163758 Semiconductor structure and manufacturing method for the same
US10163759 Apparatus and method of three dimensional conductive lines
US10163760 Semiconductor device, semiconductor device manufacturing method and semiconductor device mounting structure
US10163761 Power semiconductor arrangement
US10163762 Lead frame with conductive clip for mounting a semiconductor die with reduced clip shifting
US10163763 Integrated circuit package with multi-die communication
US10163764 Semiconductor component and method of manufacture
US10163765 Semiconductor device that includes a molecular bonding layer for bonding of elements
US10163766 Methods of forming leadless semiconductor packages with plated leadframes and wettable flanks
US10163767 Semiconductor package
US10163768 Semiconductor structure and method of manufacturing the same
US10163769 Manufacturing method for electronic element
US10163770 Fan-out package structure and method
US10163771 Interposer device including at least one transistor and at least one through-substrate via
US10163772 Stacked semiconductor device structure and method
US10163773 Electronics package having a self-aligning interconnect assembly and method of making same
US10163774 Protrusion bump pads for bond-on-trace processing
US10163775 Electronic device
US10163776 Designing method of capacitive element in multilayer wirings for integrated circuit devices based on statistical process
US10163777 Interconnects for semiconductor packages
US10163778 Structure and formation method of damascene structure
US10163779 Integrated circuit with guard ring
US10163780 Wireless charging package with chip integrated in coil center
US10163781 Semiconductor devices and methods of forming the same
US10163782 Fuse structure having multiple air dummy fuses
US10163783 Reduced area efuse cell structure
US10163784 Semiconductor device and method for manufacturing the same
US10163785 Semiconductor die contact structure and method
US10163786 Method of forming metal interconnection
US10163787 Semiconductor structure
US10163789 Semiconductor device and display device
US10163790 Manufacturing method of a semiconductor device and method for creating a layout thereof
US10163791 Semiconductor device
US10163792 Semiconductor device having an airgap defined at least partially by a protective structure
US10163793 Cobalt first layer advanced metallization for interconnects
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