 using a digital filter to act upon a input data stream in order to transform it into an output data stream, wherein: the length of an impulse response of the digital filter is finite
 an impulse response of the digital filter is symmetric
 the operation of the digital filter is multirate
 using a polyphase decomposition to break down the input data stream into N parallel substreams
 the multirate digital filter being separated by a polyphase decomposition into multiple lowerrate subfilters
 each of the subfilters being separated one or more times into a set of simpler subsubfilters, a set of prefiltering arithmetic structures, and a set of postfiltering arithmetic structures, according to a fast FIR filtering decomposition algorithm
 the set of subsubfilters comprising one or more pairs of subsubfilters which operate upon the same set of input samples and which have impulse responses which are jointly centrosymmetric
 and performing each such pair of subsubfiltering operations using a single shared filter structure, a set of prefiltering combining adders, and a set of postfiltering separating adders.
Fast FIR filtering technique for multirate filters
Updated Time 12 June 2019
Patent Registration DataPublication Number
US10003324
Application Number
US14/799950
Application Date
15 July 2015
Publication Date
19 June 2018
Current Assignee
VECIMA NETWORKS INC.
Original Assignee (Applicant)
VECIMA NETWORKS INC.
International Classification
H03H17/06,H03H17/02
Cooperative Classification
H03H17/0621,H03H17/0275,H03H2017/0247
Inventor
BERSCHEID, BRIAN,MAYILAVELANE, AROUTCHELVAME
Patent Images
This patent contains figures and images illustrating the invention and its embodiment.
Abstract
Data samples are filtered by using a digital filter where the length of an impulse response of the digital filter is finite, an impulse response of the digital filter is symmetric and the operation of the digital filter is multirate. The method uses a polyphase decomposition to break down the input data stream into N parallel substreams and the multirate digital filter is separated by a polyphase decomposition into multiple lowerrate subfilters where each of the subfilters is separated into a set of simpler subsubfilters which operate upon the same set of input samples and which have impulse responses which are jointly centrosymmetric, a set of prefiltering arithmetic structures, and a set of postfiltering arithmetic structures and performing each such pair of subsubfiltering operations using a single shared filter structure, a set of prefiltering combining adders, and a set of postfiltering separating adders.
Claims
1. A method for filtering data samples comprising: using a digital filter to act upon a input data stream in order to transform it into an output data stream, wherein: the length of an impulse response of the digital filter is finite; an impulse response of the digital filter is symmetric; the operation of the digital filter is multirate; using a polyphase decomposition to break down the input data stream into N parallel substreams; the multirate digital filter being separated by a polyphase decomposition into multiple lowerrate subfilters; each of the subfilters being separated one or more times into a set of simpler subsubfilters, a set of prefiltering arithmetic structures, and a set of postfiltering arithmetic structures, according to a fast FIR filtering decomposition algorithm; the set of subsubfilters comprising one or more pairs of subsubfilters which operate upon the same set of input samples and which have impulse responses which are jointly centrosymmetric; and performing each such pair of subsubfiltering operations using a single shared filter structure, a set of prefiltering combining adders, and a set of postfiltering separating adders.
2. The method according to claim 1, wherein the multirate digital filter is a digital interpolator and wherein a single prefiltering arithmetic structure is used to generate the set of input data samples required by multiple sets of subsubfilters.
3. The method according to claim 2, wherein the order of the prefiltering and postfiltering arithmetic structures is interchanged through a circuit transposition operation.
4. The method according to claim 1, wherein the filter is a digital decimator and a single postfiltering arithmetic structure is used to process the output samples from Multiple sets of subsubfilters.
5. The method according to claim 4, wherein the order of the prefiltering and postfiltering arithmetic structures is interchanged through a circuit transposition operation.
6. The method according to claim 1, wherein the fast FIR decomposition algorithm is a 2×2 decomposition as described in equation 6.
7. The method according to claim 1, wherein the fast FIR decomposition algorithm is a 3×3 decomposition as described in equation 8.
8. A method for filtering data samples comprising: using a digital filter to act upon a input data stream in order to transform it into an output data stream, wherein: the length of an impulse response of the digital filter is finite; an impulse response of the digital filter is symmetric; the operation of the digital filter is multirate; using a polyphase decomposition to break down the input data stream into N parallel substreams; the multirate digital filter being separated by a polyphase decomposition into multiple lowerrate subfilters; each of the subfilters being separated one or more times into a set of simpler subsubfilters, a set of prefiltering arithmetic structures, and a set of postfiltering arithmetic structures, according to a fast FIR filtering decomposition algorithm; wherein the multirate digital filter is a digital interpolator and wherein a single prefiltering arithmetic structure is used to generate the set of input data samples required by multiple sets of subsubfilters.
9. The method according to claim 8, wherein the order of the prefiltering and postfiltering arithmetic structures is interchanged through a circuit transposition operation.
10. The method according to claim 8, wherein the fast FIR decomposition algorithm is a 2×2 decomposition as described in equation 6.
11. The method according to claim 8, wherein the fast FIR decomposition algorithm is a 3×3 decomposition as described in equation 8.
12. A method for filtering data samples comprising: using a digital filter to act upon a input data stream in order to transform it into an output data stream, wherein: the length of an impulse response of the digital filter is finite; an impulse response of the digital filter is symmetric; the operation of the digital filter is multirate; using a polyphase decomposition to break down the input data stream into N parallel substreams; the multirate digital filter being separated by a polyphase decomposition into multiple lowerrate subfilters; each of the subfilters being separated one or more times into a set of simpler subsubfilters, a set of prefiltering arithmetic structures, and a set of postfiltering arithmetic structures, according to a fast FIR filtering decomposition algorithm; wherein the filter is a digital decimator and a single postfiltering arithmetic structure is used to process the output samples from multiple sets of subsubfilters.
13. The method according to claim 12, wherein the order of the prefiltering and postfiltering arithmetic structures is interchanged through a circuit transposition operation.
14. The method according to claim 12, wherein the fast FIR decomposition algorithm is a 2×2 decomposition as described in equation 6.
15. The method according to claim 12, wherein the fast FIR decomposition algorithm is a 3×3 decomposition as described in equation 8.
Claim Tree

11. A method for filtering data samples comprising:

2. The method according to claim 1, wherein
 the multirate digital filter is a digital interpolator and wherein

4. The method according to claim 1, wherein
 the filter is a digital decimator and a single postfiltering arithmetic structure is used to process the output samples from Multiple sets of subsubfilters.

6. The method according to claim 1, wherein
 the fast FIR decomposition algorithm is a 2×2 decomposition as described in equation 6.

7. The method according to claim 1, wherein
 the fast FIR decomposition algorithm is a 3×3 decomposition as described in equation 8.


88. A method for filtering data samples comprising:
 using a digital filter to act upon a input data stream in order to transform it into an output data stream, wherein: the length of an impulse response of the digital filter is finite
 an impulse response of the digital filter is symmetric
 the operation of the digital filter is multirate
 using a polyphase decomposition to break down the input data stream into N parallel substreams
 the multirate digital filter being separated by a polyphase decomposition into multiple lowerrate subfilters
 each of the subfilters being separated one or more times into a set of simpler subsubfilters, a set of prefiltering arithmetic structures, and a set of postfiltering arithmetic structures, according to a fast FIR filtering decomposition algorithm
 wherein the multirate digital filter is a digital interpolator and wherein a single prefiltering arithmetic structure is used to generate the set of input data samples required by multiple sets of subsubfilters.

9. The method according to claim 8, wherein
 the order of the prefiltering and postfiltering arithmetic structures is interchanged through a circuit transposition operation.

10. The method according to claim 8, wherein
 the fast FIR decomposition algorithm is a 2×2 decomposition as described in equation 6.

11. The method according to claim 8, wherein
 the fast FIR decomposition algorithm is a 3×3 decomposition as described in equation 8.

1212. A method for filtering data samples comprising:
 using a digital filter to act upon a input data stream in order to transform it into an output data stream, wherein: the length of an impulse response of the digital filter is finite
 an impulse response of the digital filter is symmetric
 the operation of the digital filter is multirate
 using a polyphase decomposition to break down the input data stream into N parallel substreams
 the multirate digital filter being separated by a polyphase decomposition into multiple lowerrate subfilters
 each of the subfilters being separated one or more times into a set of simpler subsubfilters, a set of prefiltering arithmetic structures, and a set of postfiltering arithmetic structures, according to a fast FIR filtering decomposition algorithm
 wherein the filter is a digital decimator and a single postfiltering arithmetic structure is used to process the output samples from multiple sets of subsubfilters.

13. The method according to claim 12, wherein
 the order of the prefiltering and postfiltering arithmetic structures is interchanged through a circuit transposition operation.

14. The method according to claim 12, wherein
 the fast FIR decomposition algorithm is a 2×2 decomposition as described in equation 6.

15. The method according to claim 12, wherein
 the fast FIR decomposition algorithm is a 3×3 decomposition as described in equation 8.
Description
This invention relates to a method for filtering data samples using a digital filter to act upon an input data stream in order to transform it into an output data stream, where the length of an impulse response of the digital filter is finite, the impulse response of the digital filter is symmetric and the operation of the digital filter is multirate.
BACKGROUND OF THE INVENTION
The following references are related to this field and may provide information relevant to the subject matter herein so that the disclosures of each of the following documents are incorporated herein by reference:
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 [3] M.J. Choe, KwangHyunBaek, and M. Teshome, “A 1.6gs/s 12bit returntozero gaas rf dac for multiple nyquist operation,”SolidState Circuits, IEEE Journal of, vol. 40, no. 12, pp. 24562468, 2005.
 [4] J. Xiao, B. Chen, T. Y. Kim, N.Y. Wang, X. Chen, T.H. Chih, K. Raviprakash, H.F. Chen, R. Gomez, and J. Chang, “A 13bit 9 gs/s rf dacbased broadband transmitter in 28 nm cmos,” in VLSI Circuits (VLSIC), 2013 Symposium on, 2013, pp. C262C263.
 [5] B. Mohr, N. Zimmermann, B. Thiel, J. Mueller, Y. Wang, Y. Zhang, F. Lemke, R. Leys, S. Schenk, U. Bruening, R. Negra, and S. Heinen, “An rfdac based reconfigurable multistandard transmitter in 65 nm cmos,” in Radio Frequency Integrated Circuits Symposium (RFIC), 2012 IEEE, 2012, pp. 109112.
 [6] K. Parhi, VLSI Digital Signal Processing Systems: Design and Implementation. Wiley, 1999.
 [7] Z.J. Mou and P. Duhamel, “Shortlength fir filters and their use in fast nonrecursive filtering,”Signal Processing, IEEE Transactions on, vol. 39, no. 6, pp. 13221332, 1991.
 [8] C. Cheng and K. Parhi, “Hardware efficient fast parallel fir filter structures based on iterated short convolution,”Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 51, no. 8, pp. 14921500, 2004.
 [9] Y.C. Tsao and K. Choi, “Areaefficient parallel fir digital filter structures for symmetric convolutions based on fast fir algorithm,”Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 20, no. 2, pp. 366371, 2012.
 [10] Z.J. Mou and P. Duhamel, “A unified approach to the fast fir filtering algorithms,” in Acoustics, Speech, and Signal Processing, 1988. ICASSP88, 1988 International Conference on, 1988, pp. 19141917 vol. 3.
 [11] I.S. Lin and S. Mitra, “Fast fir filtering algorithms based on overlapped block structure,” in Circuits and Systems, 1993, ISCAS '93, 1993 IEEE International Symposium on, 1993, pp. 363366 vol. 1.
 [12] C. Cheng and K. Parhi, “Lowcost parallel fir filter structures with 2stage parallelism,”Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 54, no. 2, pp. 280290, 2007.
 [13] Y.C. Tsao and K. Choi, “Areaefficient vlsi implementation for parallel linearphase fir digital filters of odd length based on fast fir algorithm,”Circuits and Systems II: Express Briefs, IEEE Transactions on, vol. 59, no. 6, pp. 371375, 2012.
 [14] R. Crochiere and L. Rabiner, Multirate digital signal processing. Prentice Hall, 1983.
 [15] Z.J. Mou, “Symmetry exploitation in digital interpolators/decimators,”Signal Processing, IEEE Transactions on, vol. 44, no. 10, pp. 26112615, 1996.
Finite impulse response (FIR) filters are commonly used in digital communication systems to perform a number of operations, including channel shaping or matched filtering, channel up/downconversion, channel synchronization, RF predistortion, and adaptive equalization. As a result, there has been a significant amount of research into methods of implementing FIR filters in FPGAs, ASICs and DSP processors (henceforth “FPGAs”). Over the years, a number of efficient techniques and structures have been identified and are now widely known to the industrial and academic communities [1].
Due to recent advances in RF integrated circuit technology, a current trend in the industry is to use wideband digitaltoanalog and analogtodigital converters to digitize or output large (up to multiple GHz) blocks of RF spectrum [2][5]. While this is very convenient from a system perspective, the higher sampling rates necessitated by these wideband signals place a significant computational burden upon the FPGA which processes the digital signal. In many applications, the required sampling rate of the digital signal exceeds the maximum clock frequency of the FPGA, which means that many traditional FIR filter structures are not directly applicable.
The straightforward method of handling this scenario is to construct a socalled parallel FIR filter, in which the high frequency input data is represented as L parallel streams, where L is the ratio of the sampling frequency to the FPGA clock frequency. The original prototype filter is decomposed into a set of L^{2 }subfilters which are applied to the incoming parallel data. The outputs of these subfilters are then combined in order to generate L parallel output data streams [6]. The downside of the parallel FIR approach is its cost, which increases linearly with L. As the required sampling frequency increases, the number of parallel data streams becomes large, which can render even modest filtering operations computationally expensive. Consequently, there has been renewed interest in structures for the implementation of highspeed FIR filters in recent years [6][13].
One such structure is known as the Fast FIR Algorithm (FFA), described in detail in [6], [7], and [10]. The FFA decomposes the parallel filtering operation in a manner which allows some of the subfilters to be replaced with pre and postadders. This reduces the number of multiplications required to perform the filtering operation at the cost of extra additions—an advantageous tradeoff because the hardware cost of adders is typically much less than that of multipliers.
One downside of the standard FFA algorithm is that it is not wellsuited to the case where the filter coefficients are symmetrical. Under normal circumstances, the number of multiplications required for a symmetrical filter may be cut in half by adding the common terms before multiplying. However, when the FFA is applied to a symmetrical filter, most of the FFA's subfilters are not symmetrical, thereby negating much of the benefit of the FFA. To address this deficiency, Tsao and Choi (T&C) proposed a modified FFA which is bettersuited to symmetrical filters [9]. By changing the method used to construct the subfilters, T&C were able to generate a structure in which a higher proportion of the subfilters have symmetrical coefficients, resulting in a lower computational cost for symmetrical filters than the traditional FFA.
However, the T&C FFA was designed to handle only single rate FIR filters. The algorithm cannnot be directly applied to multirate filters, such as the highrate interpolators and decimators which are needed to convert to and from the RF sampling frequency in modern systems. As a result, this critical filtering stage is typically relatively expensive in modern systems. In this paper, a technique for reducing the computational complexity of multirate filters through the use of the T&C FFA is presented. This technique is applicable to all multirate filters, but is particularly useful for high speed interpolators and decimators.
The output of a singlerate Ntap FIR filter with filter coefficients h_{i }for an infinite length input sequence x_{n }is expressed as
Unlike the singlerate filter of equation 1, an Lparallel FIR filter receives L input samples every clock cycle. Such an Lparallel filter can be expressed using a polyphase decomposition as given below
for i, j, k=0, 1, 2, . . . , L−1. For example, the standard 2by2 FFA described in [6] receives two input samples each clock cycle, as shown in FIG. 1a. This filter may be expressed mathematically as
The filter of equation (3) can be represented in matrix form as given below.
y_{2}=q_{s,2}×g_{s,2}×h_{s,2}×p_{s,2}×x_{2} (4)
where
D=z^{−1}, g_{s,2}=I_{3}, which is the 3×3 identity matrix, h_{s,2}=p_{s,2}×[H_{0 }H_{1}]^{T}, y_{2}=[Y_{0 }Y_{1}]^{T}, and x_{2}=[X_{0 }X_{1}]^{T}. Note that in this paper, the superscript^{T }denotes transposition of a matrix and the subscript _{s }indicates that the matrix in question refers to a standard FFA.
From equation (4), it is apparent that an implementation of the 2by2 standard FFA requires 3 subfilters (from subfilter matrix h_{s,2}), one preadder (from preadd matrix p_{s,2}), and three postadders (from postadd matrix q_{s,2}). Assuming a symmetrical original prototype filter, only one of the FFA subfilters (H_{0}+H_{1}) is symmetrical.
In [9], T&C presented an alternate 2by2 FFA which is specifically defined for the case of a symmetrical prototype filter. The 2by2 T&C FFA, which is shown in FIG. 1b, is mathematically expressed as
Equation 5 may be expressed in matrix form as
y_{2}=q_{c,2}×g_{c,2}×h_{c,2}×p_{c,2}×x_{2} (6)
where
g_{c,2}=diag[½½ 1], and h_{c,2}=p_{c,2}×[H_{0 }H_{1}]^{T}. In this paper, diagonal matrices such as g_{c,2 }are represented using the notation diag[rowval], where rowval is the set of values on the main diagonal. The subscript _{c }is used to indicate that a matrix belongs to a T&C FFA.
Equation 6 indicates that an implementation of the 2by2 T&C FFA requires 3 subfilters, two preadders, and four postadders, which is an increase of two adders compared to the standard FFA. However, two of the FFA subfilters, (H_{0}+H_{1}) and (H_{0}−H_{1}), are symmetrical.
Similarly, the matrix forms of the 3by3 standard and T&C FFAs are given in equations (7) and (8), respectively.
y_{3}=q_{s,3}×g_{s,3}×h_{s,3}×p_{s,3}×x_{3} (7)
where
g_{s,3}=I_{6}, h_{s,3}=p_{s,3}×[H_{0}H_{1}H_{2}]^{T}, y_{3}=[Y_{0 }Y_{1 }Y_{2}]^{T}, and x_{3}=[X_{0 }X_{1 }X_{2}]^{T}.
y_{3}=q_{c,3}×g_{c,3}×h_{c,3}×p_{c,3}×x_{3} (8)
where
g_{c,3}=diag[½½ 1½½], and h_{c,3}=p_{c,3}×[H_{0 }H_{1 }H_{2}]^{T}.
The above equations indicate that an implementation of the 3by3 standard FFA requires six subfilters, three preadders, and seven postadders. In contrast, the 3by3 T&C FFA requires six subfilters, five preadders, and twelve postadders. As with the 2by2 FFAs already discussed, the advantage of the 3by3 T&C FFA is that it yields a greater number of symmetrical subfilters: four, as opposed to two in the case of the standard 3by3 FFA.
It is possible to construct a composite LbyL FFA by cascading multiple stages of 2by2 and/or 3by3 FFAs. In this scenario, L=Π_{i=0}^{W−1}l_{i}, where l_{i}=2 or 3 represents the FFA order of the i'th stage of the decomposition and W represents the total number of stages in the decomposition. To illustrate, consider decompsing an Ntap FIR filter to generate a 6by6 FFA. The first cascading stage applies a 2by2 FFA (l_{0}=2) on the FIR filter which results in three subfilters of length N/2. The second cascading stage applies a 3by3 FFA (l_{1}=3) to decompose each subfilter from the first stage into six subfilters, each of length N/6. Thus, the 6by6 FFA has a total of 18 subfilters, each of length N/6.
In general, an LbyL standard FFA may be expressed mathematically as:
Y_{p}=Q_{s}H_{s}P_{s}X_{p} (9)
where X_{p }and Y_{p }are permuted versions of Y=[Y_{0 }Y_{1 }. . . Y_{L1}]T and X=[X_{0 }X_{1 }. . . X_{L1}]^{T}. The permutation process is described in detail in [6]. P_{s}, H_{s}, and Q_{s}, are general preadd, subfilter, and postadd matrices, which are described by equations (1012).
where B_{s,i}, which represents the postadd matrix at cascade stage i, is equal to
the number of subfilters generated by an l_{i}byl_{i }FFA, is 3 for l_{i}=2 and 6 for l_{i}=3. Q_{s,i }is an expanded version of q_{s,l}_{i}, where each element in the original matrix is replaced by an mbym matrix, m=L/(Π_{n=0}^{i}l_{n}). The rules for this replacement are as follows: each 1 is replaced by I_{m}, each 0 is replaced by 0_{m}, and each z^{−1 }is replaced by the munfolded version of z^{−1}. This type of transformation will be seen repeatedly in this paper, and will be referred to as an mbym delay unfolding transformation.
The LbyL T&C FFA applies the same cascading process but uses both standard and T&C basic FFA structures. The reason both the standard and T&C basic FFA structures are used is that applying the T&C FFA on nonsymmetrical filters does not produce symmetrical subfilters. Thus, there is no benefit to the additional cost of the T&C FFA when decomposing any subfilters that are not symmetrical. To minimize the overall system cost, it is prudent to use the T&C decomposition on only the symmetrical subfilters and the standard FFA decomposition on the nonsymmetrical subfilters.
The literature [9] discusses the process of constructing an LbyL T&C FFA, but does not provide an explicit mathematical model for the resulting filter. In this document, one such model is presented for the proposed FFAbased multirate architecture. This model can be easily generalized for the single rate T&C FFA.
SUMMARY OF THE INVENTION
According to a first aspect of the invention there is provided a method for filtering data samples comprising:
using a digital filter to act upon a input data stream in order to transform it into an output data stream, wherein:
the length of an impulse response of the digital filter is finite;
an impulse response of the digital filter is symmetric;
the operation of the digital filter is multirate;
using a polyphase decomposition to break down the input data stream into N parallel substreams;
the multirate digital filter being separated by a polyphase decomposition into multiple lowerrate subfilters;
each of the subfilters being separated one or more times into a set of simpler subsubfilters, a set of prefiltering arithmetic structures, and a set of postfiltering arithmetic structures, according to a fast FIR filtering decomposition algorithm;
the set of subsubfilters comprising one or more pairs of subsubfilters which operate upon the same set of input samples and which have impulse responses which are jointly centrosymmetric;
and performing each such pair of subsubfiltering operations using a single shared filter structure, a set of prefiltering combining adders, and a set of postfiltering separating adders.
Preferably the multirate digital filter is a digital interpolator and wherein a single prefiltering arithmetic structure is used to generate the set of input data samples required by multiple sets of subsubfilters. That is multiple redundant prefiltering arithmetic structures are simplified into a single prefiltering arithmetic structure.
Preferably the order of the prefiltering and postfiltering arithmetic structures is interchanged through a circuit transposition operation.
Preferably the filter is a digital decimator and a single postfiltering arithmetic structure is used to process the output samples from multiple sets of subsubfilters.
Preferably the order of the prefiltering and postfiltering arithmetic structures is interchanged through a circuit transposition operation.
Preferably the fast FIR decomposition algorithm is a 2×2 decomposition as described in equation 6.
Preferably the fast FIR decomposition algorithm is a 3×3 decomposition as described in equation 8.
According to a second aspect of the invention there is provided a method for filtering data samples comprising:
using a digital filter to act upon a input data stream in order to transform it into an output data stream, wherein:
the length of an impulse response of the digital filter is finite;
an impulse response of the digital filter is symmetric;
the operation of the digital filter is multirate;
using a polyphase decomposition to break down the input data stream into N parallel substreams;
the multirate digital filter being separated by a polyphase decomposition into multiple lowerrate subfilters;
each of the subfilters being separated one or more times into a set of simpler subsubfilters, a set of prefiltering arithmetic structures, and a set of postfiltering arithmetic structures, according to a fast FIR filtering decomposition algorithm;
wherein the multirate digital filter is a digital interpolator and wherein a single prefiltering arithmetic structure is used to generate the set of input data samples required by multiple sets of subsubfilters.
According to a third aspect of the invention there is provided a method for filtering data samples comprising:
using a digital filter to act upon a input data stream in order to transform it into an output data stream, wherein:
the length of an impulse response of the digital filter is finite;
an impulse response of the digital filter is symmetric;
the operation of the digital filter is multirate;
using a polyphase decomposition to break down the input data stream into N parallel substreams;
the multirate digital filter being separated by a polyphase decomposition into multiple lowerrate subfilters;
each of the subfilters being separated one or more times into a set of simpler subsubfilters, a set of prefiltering arithmetic structures, and a set of postfiltering arithmetic structures, according to a fast FIR filtering decomposition algorithm;
wherein the filter is a digital decimator and a single postfiltering arithmetic structure is used to process the output samples from multiple sets of subsubfilters.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1A is an illustration of a standard or prior art 2×2 filter having a FFA structure.
FIG. 1B is an illustration of a standard or prior art 2×2 filter having a T&C FFA structure.
FIG. 2A is an illustration of a standard or prior art polyphase upsample by 2 filter.
FIG. 2B is an illustration of a 2×2 FFA upsample by 2 filter which clearly shows the coefficents of the individual subsubfilters.
FIG. 2C is an illustration of a 2×2 FFA upsample by 3 filter.
FIG. 3A is an illustration of a standard or prior art 2×2 filter having a T&C FFA structure.
FIG. 3B is an illustration of a 2×2 filter having a transposed T&C FFA structure.
FIG. 4A is an illustration of a standard or prior art polyphase upsample by 2 filter.
FIG. 4B is an illustration of a 6×6 FFA upsample by 2 filter.
FIG. 4C is an illustration of a 6×6 FFA downsample by 2 filter.
FIG. 5 is an illustration of a 12×12 filter having a T&C FFA structure.
FIG. 6 is an illustration comparing the multiplier usage of the proposed structure to that of the standard or prior art parallel structure for a variety of parallelism factors.
FIG. 7 is a Table 1 which indicates the number of preadders and postadders required for various transposed and nontransposed FFA structures.
FIG. 8 is a Table 2 which compares the computational complexity of the proposed structure and the standard or prior art parallel structure for a number of example filters.
DETAILED DESCRIPTION
Sample rate converters are a special class of multirate FIR filters. Two main types of sample rate converters exist: interpolators and decimators. Since a decimator can easily be obtained by transposing the signal flow graph of an interpolator [14], the discussion which follows concentrates on interpolators.
The polyphase decompostion of a singleinput 1toM interpolator [15] is expressed in the zdomain as shown below.
where
for N=KM. If the interpolator receives more than one input sample on every clock cycle, a specialized filter structure is required for the implementation. This paper proposes an FFAbased architecture that reduces the multiplier and adder requirements for symmetrical FIR sample rate converters. In the case of an Lparallel 1toM FFA based interpolator, the structure is developed as follows:
Step 1: Apply the polyphase decomposition technique described by equation (13) to the FIR interpolator. This decomposition results in M polyphase subfilters.
Step 2: Apply an LbyL FFA decomposition to each polyphase subfilter, thereby breaking it down into multiple FFA subfilters (also referred to herein as subsubfilters).
Step 3: Since each polyphase subfilter receives the same Lparallel input data, only one copy of the FFA preadd section is required, as shown in FIG. 2c. M−1 redundant copies of the preadd structure may be removed. Note that M copies of the postadd structure are required, one for each polyphase subfilter.
The first optimization, which may be used to reduce the total number of multipliers required to implement the filter, will be introduced through an example.
Consider the construction of a 2parallel version of a 1to2 interpolator using the procedure described above. In this example, the symmetrical interpolation filter is 16 taps long, with the coefficients defined as h_{0}, h_{1}, . . . , h_{7}, h_{7}, h_{6}, . . . , h_{0}. Performing a polyphase decomposition will result in two polyphase subfilters, H_{0 }and H_{1}, which will contain the odd and even coefficients of the original prototype filter, respectively. Since two input samples are received every clock cycle, the 2by2 T&C FFA is applied to decompose each polyphase subfilter H_{i}, into three 4tap FFA subfilters (H_{i,j}), where i represents the polyphase subfilter numbering and j represents the FFA subfilter numbering.
FIG. 2b shows the coefficients of the 4tap FFA subfilters, which are represented as h_{i,j,0}, . . . , h_{i,j,3}. It can be seen from the figure that none of the FFA subfilters is symmetrical. However, FFA subfilters H_{0,0 }and H_{1,0 }contain the same set of coefficents but in the opposite order (h_{0,0,0}=h_{0,0,3}, . . . , h_{0,0,3}=h_{1,0,0}). Furthermore, these two subfilters take the exact same input (shown as X_{a }in the figure). In [15], Mou showed that it is possible to exploit this centrosymmetry as follows in order to implement the two filters using four multipliers and eight adders, instead of the eight multipliers and six adders required by the straightforward implementation.
where
c_{i}=(H_{0,0}[i]+H_{1,0}[i])/2, d_{i}=(H_{0,0}[i]−H_{1,0}[i])/2 and I_{2 }and J_{2 }represent the 2by2 identity and counter identity matrices, respectively. Notice that the original filtering operations have been broken down into a set of prefiltering combining adders (represented by matrix D), a simpler filtering operation, and a set of postfiltering separating adders (represented by matrix A.
Similarly, the coefficients used by FFA subfilter H_{1,1 }are the reversed and negated versions of those used by H_{0,1}. This subfilter pair may also be computed using equation (15) with the following minor substitution:
Note that the subfilters H_{0,2 }and H_{1,2 }are not symmetrical, so they must be implemented using one multiplier per coefficient.
Next, consider the case of a 2parallel 1to3 FFAbased interpolator, as shown in FIG. 2c. If the FFA subfilter coefficients are explicitly decomposed as was done in FIG. 2b for the 1to2 case, it will be apparent that some centrosymmetric FFA subfilter pairs exist between the polyphase subfilters H_{0 }and H_{2}. Additionally, some of the FFA subfilters arising from interpolator subfilter H_{1 }are individually symmetrical, and may therefore be implemented in the typical way to reduce the multiplier usage by half.
In general, for any LbyL FFA based symmetrical interpolator or decimator, centrosymmetric FFA subfilter pairs exist between the T&C FFAs of the polyphase subfilters H_{i }and H_{M+1−i}, where i=1, 2, . . . , └M/2┘−1. If M is odd, the polyphase subfilter H_{(M−1)/2+1 }will generate some symmetrical FFA subfilters. By exploiting both forms of symmetry, it is possible to reduce the multiplier cost of multirate FFA implementations. Note that a derivation of the multiplier costs of various composite FFAs is provided hereinafter.
It is wellknown [14] that if the signal flow graph of a singlerate linear system is transposed, the functionality of the system is unchanged. This process can be applied to any FFA decomposition in order to generate an alternate structure. For example, consider FIGS. 3a and 3b, which show the 2×2 T&C FFA in the normal and transposed formats. Although these two systems are functionally identical, they clearly use different pre and post adder structures. It is apparent from FIG. 3 that the typical 2×2 T&C FFA requires 2 pre adders and 4 post adders, whereas the transposed structure requires 3 pre adders and 3 post adders.
In general, the effect of transposition on an FFA is to transfer some of the adders from the post adder structure into the pre adder structure. Table 1 summarizes the pre and post adder requirements for a variety of FFA structures. Note that the FFA subfilters are unaffected by transposition.
It is apparent from Table 1 that transposition does not change the logic resources required to implement a single rate FFA, as the increase in pre adder resources is exactly balanced by a decrease in post adder resources. However, this is not the case for multirate FFAs. To illustrate this fact, consider the case of a 1to2 interpolator with 6 parallel inputs, shown in FIG. 4. After each of the polyphase subfilters from FIG. 4a is converted into a 6×6 FFA, the interpolator requires 2 copies of the 6×6 post adder structure, but only one copy of the 6×6 pre adder structure, as indicated in FIG. 4b. The 6×6 pre and post adders themselves require three copies of the 2×2 T&C structure, two copies of the 3×3 T&C structure, and one copy of the standard 3×3 structure. Referring to Table 1 for the individual costs, the total number of pre and post adders required if nontransposed structures are used is 105. If the transposed structures are used instead for the individual FFAs, only 93 pre and post adders are needed, representing a cost reduction of 12 adders.
In general, 1toM interpolators require M copies of the post adder structure and only 1 copy of the pre adder structure. As a result, the most economical implementation for an interpolator is achieved through the transposed architecture, which transfers some of the complexity from the post adder structure to the pre adder structure. Conversely, the nontransposed architectures result in more economical implementations for decimators, due to the fact that Mto1 decimators require M copies of the pre adder structure and only 1 copy of the post adder structure, as indicated in FIG. 4c. The number of adders saved by using the optimal transpostion increases as the rate change factor M and the parallelism L increase.
When transposition is performed, the updated pre and post adder matrices may be found through the following procedure:
1) Set post adder matrix to transpose of original pre adder matrix
2) Set pre adder matrix to transpose of original post adder matrix
3) Reverse order of rows in post adder matrix
4) Reverse order of columns in pre adder matrix
An Lparallel 1toM FFA interpolator may be represented mathematically as follows:
where M is the upsmapling factor, Q_{c }is the postadder matrix of an LbyL FFA, Y_{p,i }is a permuted version of the output of an LbyL FFA performed on the i^{th }polyphase subfilter, H_{c,i }is an LbyL FFA subfilter matrix derived from the i^{th }polyphase subfilter, P_{c }is the preadder matrix of an LbyL FFA and X_{p }is the permuted version of the input of the LbyL FFA or FFA interpolator.
The derivation of each of these quantities is described in detail in the following sections.
1) Derive PreAdd Matrix:
As shown in equation 10, the preadder matrix of a composite LbyL standard FFA is constructed by forming the tensor product of the preadder matrices of each of the elementary (2by2 or 3by3) FFAs. However, the expression for the preadder matrix of an LbyL T&C FFA is more complex.
To illustrate, consider a 6by6 FFA implemented by cascading 2by2 and 3by3 FFAs. The preadder matrix for a 6by6 was developed hereinbefore, and is shown in equation 19. In the case of a symmetrical filter, the 6by6 T&C FFA is developed as follows.
The first cascading stage of 6by6 T&C FFA involves a 2by2 T&C FFA, which breaks down the original filter into two symmetrical and one nonsymmetrical FFA subfilters. The second stage of the decomposition involves using a 3by3 FFA to further decompose each of the subfilters from the first stage. When decomposing the symmetrical subfilters, the T&C FFA is used. However, since one of the subfilters is not symmetrical, it will not yield any symmetrical subfilters when decomposed. Therefore, it is preferable to use the less expensive standard FFA when decomposing the nonsymmetrical filter.
In order to derive an expression for the 6by6 T&C FFA, it is useful to note that the first two rows of the preadder matrix p_{c,2 }generate inputs for the symmetrical subfilters, whereas the third row generates an input for the nonsymmetrical subfilter. Since these two sets of subfilters are to be decomposed in different ways, a technique for mathematically separating the rows of p_{c,2 }is needed. This paper introduces two new matrices for this purpose: S_{c,2}=diag[1 1 0] extracts the rows which correspond to symmetrical subfilters, and S_{s,2}=diag[0 0 1] extracts the rows which correspond to nonsymmetrical subfilters. Similarly, two other matrices S_{c,3}=diag[0 0 1 1 1 1] and S_{s,3}=[1 1 0 0 0 0] are introduced to extract the rows from p_{c,3 }related to symmetrical and nonsymmetrical 3by3 T&C FFA subfilters, respectively. The 6by6 T&C preadder matrix is generated by applying the T&C 3by3 FFA to the symmetrical portion of p_{c,2 }and the standard 3by3 FFA to the nonsymmetrical portion of p_{c,2}, as shown in equation 18.
P_{c,6}=[S_{s,2}×p_{c,2}]p_{c,3}+[S_{n,2}×p_{c,2}]p_{s,3} (18)
P_{s,6}=p_{c,2}p_{s,3} (19)
Extending the example one step further, a 12by12 FFA may be viewed as a cascade of 2by2 and 6by6 FFAs as shown in FIG. 5. As in the previous example, after performing the initial 2by2 decomposition, one of the subfilters is nonsymmetrical, and is therefore best suited to a standard FFA decomposition. Thus, as shown in equation 20, the derivation of a 12by12 T&C FFA requires both the 6by6 standard and T&C FFAs. A graphical representation of the filter structure is provided in FIG. 5.
P_{c,12}=[S_{s,2}×p_{c,2}]P_{c,6}+[S_{n,2}×p_{c,2}]P_{s,6} (20)
In general, the derivation of the preadder matrix for a composite T&C FFA involves an iterative process that starts from the final cascading stage, W−1. The first step of the iterative process defines the T&C preadder matrix P_{c,l}_{W−1 }and standard preadder matrix P_{s,l}_{W−1 }as shown in equation 21.
P_{c,l}_{W−1}=p_{c,l}_{W−1 }and P_{s,l}_{W−1}=p_{s,l}_{W−1} (21)
For the subsequent iterations, j=W−2, W−3, . . . , 0, the preadder matrices of both bbyb T&C and standard FFAs, where b=Π_{i=j}^{W−1}l_{i }are computed as shown in equations 22 and 23, respectively.
P_{c,b}=[S_{c,l}_{j}×p_{c,l}_{j}]P_{c,b′}+[(S_{n,l}_{j}×p_{c,l}_{j}]P_{s,b′}, (22)
P_{s,b}=P_{s,l}_{j}p_{s,l}_{j+1} . . . p_{s,l}_{W−2}p_{s,l}_{W−1} (23)
where b′=b/l_{j}. The final preadder matrix, P_{c}, is equal to P_{c,L}.
2) Derive Subfilter Matrix:
The subfilter matrix H_{c,m}, for m=0, 1, . . . , M−1, which represents the FFA subfilters of m^{th }polyphase subfilter H, is given as
H_{c,m}=G_{c}×P_{c}×H_{m}, (24)
where G_{c }is the gain of the FFA.
The gain matrix G_{c }is derived through the same iterative process used to derive the preadder matrix, explained in −1. The first iterative step, j=W−1, starts with gain matrices of both T&C and standard FFAs from the final cascading stage, as given below.
G_{c,l}_{W−1}=g_{c,l}_{W−1 }and G_{s,l}_{W−1}=g_{s,l}_{W−1} (25)
For the subsequent iterations, j=W−2, W−3, . . . , 0 the gain matrices of both bbyb standard and T&C sections are determined using equations 26 and 27.
G_{s,b}=g_{s,l}_{j}g_{s,l}_{j+1} . . . g_{s,l}_{W−2}g_{s,l}_{W−1} (26)
G_{c,b}=[S_{c,l}_{j}×g_{c,l}_{j}]G_{c,b′}+[(S_{n,l}_{j}×g_{c,l}_{j}]G_{s,b′}, (27)
The final gain matrix, G_{c}, is equal to G_{c,L}.
3) Derive PostAdd Matrix:
The procedure for computing the postadder for a composite standard FFA was previously provided in equation 12. Applying this procedure to a 6by6 standard FFA yields the result shown in equation 28 below.
Q_{s,6}=B_{s,1}^{(6)}×B_{s,0}^{(6)}, where (28)
B_{s,0}^{(6)}=I_{3}q_{s,3} (29)
B_{s,1}^{(6)}=Q_{s,2}^{(6)}, (30)
where Q_{s,2}^{6 }is generated by performing a 3by3 delay unfolding transformation on matrix q_{s,2}. Note that in this section, the superscript ^{(x) }is used to indicate that the matrix in question belongs to an xbyx FFA, and does not imply any mathematical operations. Thus, the matrix B_{s,0}^{(6) }is identical to the matrix B_{s,0}. This superscript notation is used only to clarify the examples discussed in this section, and is not used for generalized LbyL FFA derivation which follows.
The derivation of 6by6 T&C postadd matrix is more complex because both the T&C and standard postadd matrices are involved. As shown in FIG. 4b, the overall postadder structure for this filter may be broken up into two stages. The first stage of postadders connects directly to the 18 FFA subfilters and corresponds to the final (3by3) stage of the cascaded FFA decomposition. The first two sets of 6 subfilters were generated by applying the 3by3 T&C FFA to two symmetrical subfilters from the first cascading stage, so the corresponding postadders use the T&C structure. The final set of 6 subfilters was generated by applying the 3by3 standard FFA to the nonsymmetrical subfilter from the first cascading stage, so its post adder uses the standard FFA structure. The output of the first stage of the postadd section is represented mathematically as shown in Equation 32. In the second postadder stage, which is represented by equation 33, the output of the 3by3 postadder structures are connected to three 2by2 T&C postadder structures.
Q_{c,6}=B_{c,1}^{(6)}×B_{c,0}^{(6)}, where (31)
B_{c,0}^{(6)}=(S_{c,2}q_{c,3})+(S_{s,2}q_{s,3}) (32)
B_{c,1}^{(6)}=Q_{c,2}^{(6)}, (33)
where Q_{c,2}^{(6) }is generated by performing a 3by3 delay unfolding transformation on q_{c,2}.
The 12by12 postadd matrices of standard and T&C FFAs are given in equations 34 and 38 respectively.
Q_{s,12}=B_{s,2}^{(12)}×B_{s,1}^{(12)}×B_{s,0}^{(12)}, where (34)
B_{s,0}^{(12)}=I_{3}(I_{3}q_{s,3})=I_{3}B_{s,0}^{(6)} (35)
B_{s,1}^{(12)}=I_{3}Q_{s,2}^{(6)} (36)
B_{s,2}=Q_{s,2}^{(12)} (37)
where Q_{s,2}^{(12) }is generated by performing a 6by6 delay unfolding transformation on q_{s,2}.
Q_{c,12}=B_{c,2}^{(12)}×B_{c,1}^{(12)}×B_{c,0}^{(12)}, where (38)
B_{c,0}^{(12)}=(S_{c,2}B_{c,0}^{(6)})+(S_{s,2}B_{s,0}^{(6)}) (39)
B_{c,1}^{(12)}=(S_{c,2}Q_{c,2}^{(6)})+(S_{s,2}Q_{s,2}^{(6)}) (40)
B_{c,2}^{(12)}=Q_{c,2}^{(12)} (41)
where Q_{c,2}^{(12) }is generated by performing a 6by6 delay unfolding transformation on q_{c,2}.
The derivation of generalized LbyL T&C postadd matrix Q_{c }is expressed as
where B_{c,W−1−i }is derived below. From the above examples, it is clear that the derivation of B_{c,W−1−i }involves an iterative process.
The first iterative step (j=0) defines two matrices B_{c,i,j}=Q_{c,l}_{i }and B_{s,i,j}=Q_{s,l}_{i}, where Q_{c,l}_{i }and Q_{s,l}_{i }are generated by performing L/(Π_{n=0}^{i}l_{n})byL/(Π_{n=0}^{i}l_{n}) delay unfolding transformations on matrices q_{c,l}_{i }and (q_{s,l}_{i}), respectively.
The subsequent iterative steps (j=1, . . . , i) are defined as follows.
B_{c,i,j}=(S_{c,l}_{i−j}B_{c,i,j−1})+(S_{n,l}_{i−j}B_{s,i,j−1}), (43)
In eqn (43), B_{s,i,j−I }is obtained as given below.
B_{s,i,j}=I_{F}_{i}B_{s,i,j−1}, (44)
where F_{i}=3 for l_{i−j}=2 and F_{i}=6 for l_{i−j}=3. The matrix B_{c,W−1−i }is equal to B_{c,i,i }
The resource usage of the proposed technique may be analyzed in three main sections: the subfilters, the polyphase combiner adders (in the case of a decimator), and the FFA pre/post adders. Considering the subfilters first, when a multirate filter is implemented using the proposed scheme, the total number of subfilters may be determined as follows:
where F_{i}, the number of subfilters generated by the i'th FFA, is 3 for a 2×2 FFA and 6 for a 3×3 FFA. Each of the subfilters has N/LM coefficents. Of these subfilters, a fraction equal to (⅔)^{W }are either individually symmetric or jointly centrosymmetric, with the remainder being asymmetric. As previously discussed, it is possible to exploit either type of symmetry in order to reduce the required multiplier resources by half. Thus, the total number of multipliers required to implement the filter is:
The number of adders typically required to implement an FIR subfilter is one less than the number of filter coefficients. In order to exploit the symmetry in the jointly centrosymmetric subfilters, one additional adder is required per subfilter. Thus, the total number of adders required for the subfilters is:
In the case of a decimator, the most efficient implementation is generated by placing the adders associated with the polyphase combiner right after the subfilters and before the FFA post adders, as shown in FIG. 4c. In this case, the required number of polyphase combiner adders is:
When constructing a singlerate composite FFA larger than 2×2 or 3×3, multiple copies of the standard 2×2 or 3×3 pre and post adder structures are required. The exact number of copies depends on the sequence of FFA decompositions used to construct the composite filter. At each stage of the decomposition, C_{i}, the number of copies required, may be determined based on the number of inputs to the pre adder stage as follows:
As previously discussed, the T&C FFA structure is used when decomposing filters that are symmetric or jointly centrosymmetric, while the standard FFA decomposition is used for asymmetric filters. Thus, the fraction of the pre and post adder copies which use the T&C structure in the i'th stage of the FFA decomposition is ⅔^{i−1}. The standard FFA structure is used for the remaining copies.
For multirate FFA structures, the total pre and post adder cost depends on whether the filter is an interpolator or a decimator. M copies of the pre adder structure are required for decimators, while M copies of the post adder structure are required for interpolators. Thus, the required numbers of pre and post adders for the proposed interpolator and decimator structures are given by equations 50 and 51, respectively:
where A_{S}_{_}_{pre}_{i}, A_{S}_{_}_{post}_{i}, A_{C}_{_}_{pre}_{i}, and A_{C}_{_}_{post}_{i }refer to the number of adders in the standard/T&C pre/post adder structure used for the FFA decomposition at stage i. These values are listed in Table 1.
The typical way to implement a multirate filter at sampling rates higher than the system clock rate is to extend the parallel filtering approach described in [6]. Such an approach would involve breaking down each of the M polyphase filter branches into L^{2 }subfilters. Since each pair of subfilters is jointly centrosymmetric in this case, the total number of multipliers required is
The total number of adders required is NL−LM for interpolators and NL−L for decimators.
Table 2 compares the required computational resources of the parallel and proposed techniques for a variety of multirate filters. Note that in the “Saved Adders” column, the number without parentheses represents the total difference between the proposed approach and the parallel approach, whereas the number in parentheses represents the saving achieved by using the optimized transposed architecture.
It is clear from equation 46 and Table 2 that the number of multipliers saved by the proposed approach does not depend on the rate change factor M. Rather, the multiplier savings are determined solely by the parallelism factor L. As the parallelism increases, the multiplier savings relative to the parallel case also increases, as highlighted in FIG. 6. Thus, higher levels of parallelism are desirable from a resource utilization perspective, although there is a tradeoff in terms of increased design complexity.
It should be noted that the proposed approach is not limited to cases where the signal's sampling frequency exceeds the system clock frequency. In situations where the converse is true, this technique may be applied in order to trade logic resource consumption or chip area for a reduction in dynamic power consumption. The application of the proposed technique will reduce the operating rate of the multipliers, thereby requiring more discrete multipliers in order to perform the operation. However, the total number of multiplications performed by the system per unit of time will be reduced according to the relationship shown in FIG. 6, resulting in a corresponding reduction in the dynamic power consumed by the module.
The arrangements herein provide a technique for applying FastFIR filtering to upsampling and downsampling filters, resulting in a reduction in the computational complexity and hardware implementation costs of such filters. The technique allows for the exploitation of symmetry in the prototype filter coefficients, which allows for a further reduction in the number of multipliers required to construct the filters.
The structure and computational complexity of the derived multirate Fast FIR filters may be modified by transposing the signal flow graphs of the individual FastFIR decompositions, allowing some duplicate pre and postadder sections to be combined. In the case of an upsampler, the transposed version of the filter results in a more economical hardware implementation. Conversely, the nontransposed filter structure is more economical for downsamplers.
Furthermore, the arrangements herein provide a series of generalized equations describing the operation of the symmetrical FIR exploitation scheme originally presented by T&C and utilized in the present technique. Such equations were not previously available in the public literature. These equations simplify the application of the T&C FIR technique for arbitrary numbers of parallel inputs.