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Patent Analysis of

Electronic component and electronic device

Updated Time 12 June 2019

Patent Registration Data

Publication Number

US10062658

Application Number

US14/792476

Application Date

06 July 2015

Publication Date

28 August 2018

Current Assignee

FUJITSU LIMITED

Original Assignee (Applicant)

FUJITSU LIMITED

International Classification

H01L23/00,H01L23/498,H05K3/34

Cooperative Classification

H01L24/16,H01L23/49811,H01L24/13,H01L23/49838,H01L23/49866

Inventor

SAKUYAMA, SEIKI,AKAMATSU, TOSHIYA,IMAIZUMI, NOBUHIRO,UENISHI, KEISUKE,YASAKA, KENICHI,SAKAI, TORU

Patent Images

This patent contains figures and images illustrating the invention and its embodiment.

US10062658 Electronic component electronic 1 US10062658 Electronic component electronic 2 US10062658 Electronic component electronic 3
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Abstract

A surface of at least one of a connection terminal of an electronic component and a connection terminal of a circuit board is covered with a protection layer made of a AgSn alloy. The connection terminal of the electronic component is soldered to the connection terminal of the circuit board.

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Claims

1. An electronic component comprising:

a connection terminal to be soldered to a semiconductor device with solder made of an alloy of Ag and Sn, the connection terminal made of Cu; and a protection layer made of a AgSn alloy of only Ag and Sn, with which a surface of the connection terminal before being soldered to the semiconductor device is directly covered, the protection layer on which the solder is mounted, wherein a Ag content in the solder is equal to or above 2.0 wt % and equal to or below 4.0 wt %, and a Ag content in the protection layer is equal to or above 10 wt % and equal to or below 95 wt %.

2. The electronic component according to claim 1, wherein the AgSn alloy is Ag3Sn.

3. The electronic component according to claim 1, wherein the surface of the connection terminal, that is directly covered with the protection layer, directly contacts the protection layer.

4. An electronic device comprising:

a semiconductor device; a first connection terminal of the semiconductor device, the first connection terminal made of Cu; a circuit board having the semiconductor device; a second connection terminal of the circuit board, the second connection terminal made of Cu; a solder made of an alloy of Ag and Sn; a protection layer made of a AgSn alloy of only Ag and Sn, with which a surface of at least one of the first connection terminal and the second connection terminal before being bonded to each other with the solder is directly covered; and the solder bonding the first connection terminal to the second connection terminal, the solder that is mounted on the protection layer, wherein a Ag content in the protection layer is equal to or above 10 wt % and equal to or below 95 wt %, and a Ag content in the solder is equal to or above 2.0 wt % and equal to or below 4.0 wt %.

5. The electronic device according to claim 4, wherein the AgSn alloy is Ag3Sn.

6. The electronic device according to claim 4, wherein a current flowing between the connection terminal of the semiconductor device and the connection terminal of the circuit board has a current density equal to or above 104 A/cm2.

7. The electronic device according to claim 4, wherein the protection layer is provided only on the connection terminal on a low-potential side out of the connection terminal of the semiconductor device and the connection terminal of the circuit board.

8. The electronic device according to claim 4, wherein the surface of at least the one of the first connection terminal and the second connection terminal, that is directly covered with the protection layer directly contacts the protection layer.

9. A semiconductor device comprising:

a connection terminal to be soldered to a different electronic component with solder made of an alloy of Ag and Sn, the connection terminal made of Cu; and a protection layer made of a AgSn alloy of only Ag and Sn, with which a surface of the connection terminal is directly covered, the protection layer on which the solder is mounted, wherein a Ag content in the solder is equal to or above 2.0 wt % and equal to or below 4.0 wt %, and a Ag content in the protection layer is equal to or above 10 wt % and equal to or below 95 wt %.

10. The semiconductor device according to claim 9, wherein the AgSn alloy is Ag3Sn.

11. The semiconductor device according to claim 9, wherein the surface of the connection terminal, that is directly covered with the protection layer directly contacts the protection layer.

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Claim Tree

  • 1
    tronic component comprisin : a connec
    • on terminal to be soldered to a semiconductor device with solder made of an alloy of Ag and Sn, the connection terminal made of Cu; and a pr
    • ection layer made of a AgSn alloy of only Ag and Sn, with which a surface of the connection terminal before being soldered to the semiconductor device is directly covered, the protection layer on which the solder is mounted, wherein a Ag content in the solder is equal to or above 2.0 wt % and equal to or below 4.0 wt %, and a Ag content in the protection layer is equal to or above 10 wt % and equal to or below 95 wt %. 2. The el
    • ctronic component according to claim 1, wherein t e AgSn
      • lloy is Ag3Sn. 3.
    • he electronic component according to claim 1, whe ein the
      • surface of the connection terminal, that is directly covered with the protection layer, directly contacts the protection layer. 4.
  • 4
    n electronic device com rising: a
    • miconductor device; a
    • rst connection terminal of the semiconductor device, the first connection terminal made of Cu; a
    • rcuit board having the semiconductor device; a
    • cond connection terminal of the circuit board, the second connection terminal made of Cu; a
    • lder made of an alloy of Ag and Sn; a
    • otection layer made of a AgSn alloy of only Ag and Sn, with which a surface of at least one of the first connection terminal and the second connection terminal before being bonded to each other with the solder is directly covered; an
    • the solder bonding the first connection terminal to the second connection terminal, the solder that is mounted on the protection layer, wherein a Ag content in the protection layer is equal to or above 10 wt % and equal to or below 95 wt %, and a Ag content in the solder is equal to or above 2.0 wt % and equal to or below 4.0 wt %. 5.
    • he electronic device according to claim 4, whe ein the
      • AgSn alloy is Ag3S
    • . 6. The electronic device according to claim , where
      • n a current flowing between the connection terminal of the semiconductor device and the connection terminal of the circuit board has a current density equal to or above 104 A/c
    • 2. 7. The electronic device accordi g to cl
      • im 4, wherein the protection layer is provided only on the connection terminal on a low-potential side out of the connection terminal of the semiconductor device and the connection terminal of the
    • ircuit board. 8. The electronic device accordi g to cl
      • im 4, wherein the surface of at least the one of the first connection terminal and the second connection terminal, that is directly covered with the protection layer directly contacts the pro
  • 9
    ection layer. 9. A semico ductor dev
    • e comprising: a connection terminal to be soldered to a different electronic component with solder made of an alloy of Ag and Sn, the connection termi
    • l made of Cu; and a protection layer made of a AgSn alloy of only Ag and Sn, with which a surface of the connection terminal is directly covered, the protection layer on which the solder is mounted, wherein a Ag content in the solder is equal to or above 2.0 wt % and equal to or below 4.0 wt %, and a Ag content in the protection layer is equal to or above 10 wt % and equal to or
    • elow 95 wt %. 10. The semiconductor device accordi g to cl
      • im 9, wherein the AgSn alloy
    • s Ag3Sn. 11. The semiconductor device a cording
      • to claim 9, wherein the surface of the connection terminal, that is directly covered with the protection layer directly contacts t
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Description

CROSS-REFERENCE TO RELATED APPLICATION

This application is based upon and claims the benefit of priority of the prior Japanese Patent Application No. 2011-282725, filed on Dec. 26, 2011, the entire contents of which are incorporated herein by reference.

FIELD

The embodiments discussed herein are related to an electronic component and an electronic device.

BACKGROUND

The number of connection terminals in a semiconductor device (an LSI: a large scale integrated circuit) has tended to increase in recent years along with advances in performance and integration of such a semiconductor device, and there is a growing demand for further reduction in size of connection terminals.

In flip-chip mounting, a connection terminal of a semiconductor device and a connection terminal of a wiring board are connected to each other by using a solder bump. Such a solder bump is made of an alloy (solder) such as Sn-3.5 wt % Ag, Sn-0.7 wt % Cu or Sn-3 wt % Ag-0.5 wt % Cu. In the meantime, the connection terminals of the semiconductor device and the wiring board are usually made of Cu (copper). Surfaces of the connection terminals may occasionally be plated with Ni (nickel) or Au (gold) in order to prevent corrosion or to improve solder wettability on the surfaces of the terminals.

[Patent Document 1] Japanese Laid-open Patent Publication No. 10-41621

SUMMARY

According to a first aspect of the disclosed techniques, an electronic component includes a connection terminal to be soldered to a different electronic component, in which a surface of the connection terminal is covered with a protection layer made of a AgSn alloy.

According to a second aspect of the disclosed techniques, an electronic device includes an electronic component; a circuit board having the electronic component mounted thereon; and solder bonding a connection terminal of the electronic component to a connection terminal of the circuit board, in which a surface of at least one of the connection terminal of the electronic component and the connection terminal of the circuit board is covered with a protection layer made of a AgSn alloy.

The object and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the claims.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention.

BRIEF DESCRIPTION OF DRAWINGS

FIGS. 1A and 1B are views depicting results of investigating Cu distribution with time in the case of applying a current at a current density of 6×10−3 A/cm2 between connection terminals made of Cu under a temperature environment of 150° C.;

FIGS. 2A and 2B are views depicting results of investigating Ni distribution with time under similar conditions to those used in FIGS. 1A and 1B with surfaces of the connection terminals plated with Ni;

FIG. 3A is a view depicting an example of an electronic component according to an embodiment while FIG. 3B is an enlarged view depicting a portion of a connection terminal of the electronic component;

FIG. 4 is a view depicting a junction between a connection terminal of the electronic component and a connection terminal of a circuit board;

FIGS. 5A to 5C are views schematically depicting samples of Example and Comparative Examples 1 and 2;

FIG. 6 is a graph illustrating results of investigation of time to cause wiring disconnections in the samples of Example and Comparative examples 1 and 2; and

FIG. 7 is a graph illustrating results of investigation of relations between Ag contents in AgSn alloys and time to cause wiring disconnections.

DESCRIPTION OF EMBODIMENTS

Prior to description of embodiments, a prelude will be given below in order to facilitate understanding of the embodiments.

As described previously, in recent years, connection terminals of electronic components such as semiconductor devices have tended to be reduced in size and thus densities of currents (current densities) flowing through the connection terminals have tended to be increased. However, when a density of a current flowing through a connection terminal becomes equal to or above about 104 A/cm2, electromigration occurs at a junction between the connection terminal and solder, thereby increasing a resistance value between connection terminals. In an extreme case, such electromigration may result in a wiring disconnection.

FIGS. 1A and 1B are views depicting results of investigating Cu distribution with time in the case of bonding connection terminals made of Cu to each other by using a solder bump and applying a current at a current density of 6×10−3 A/cm2 between the connection terminals under a temperature environment of 150° C. Here, a direct current flows from the upper connection terminal to the lower connection terminal. Note that an electron probe microanalyzer (EPMA) is used for acquisition of the Cu distribution.

As apparent from FIGS. 1A and 1B, Cu atoms contained in the connection terminals migrate from below (a low-potential side) to above (a high-potential side) with time. A position after migration of a Cu atom constitutes an atomic vacancy. When a number of such atomic vacancies are generated, such vacancies may be collectively recognized as electromigration.

FIGS. 2A and 2B are views depicting results of investigating Ni distribution with time under similar conditions to those used in FIGS. 1A and 1B with surfaces of the connection terminals plated with Ni. As apparent from FIGS. 2A and 2B, Ni atoms migrate from below to above with time. Therefore, Ni plating does not prevent the electromigration.

A conceivable option to suppress such electromigration is to increase the number of connection terminals and to thereby reduce a current density in each of the connection terminals. However, this leads to an increase in a layout space for the connection terminals, which results in an increase in size of a semiconductor device.

In view of the above, an object of the embodiments is to provide an electronic component and an electronic device, which are less likely to cause electromigration even when a current having a high current density flows through a junction between a connection terminal and solder.

EMBODIMENT

FIG. 3A is a view depicting an example of an electronic component according to an embodiment and FIG. 3B is an enlarged view depicting a portion of a connection terminal of the electronic component. Meanwhile, FIG. 4 is a view depicting a junction between a connection terminal of the electronic component and a connection terminal of a circuit board.

An electronic component 10 according to the embodiment includes a semiconductor chip 11a provided with a given electronic circuit, and a package (sealing resin) lib which seals the semiconductor chip 11a. Meanwhile, a number of connection terminals 12 are provided on a lower surface side of the semiconductor chip 11a. The connection terminals 12 are made of Cu and a protection layer 13 made of a AgSn (silver-tin) alloy is provided on each surface of the connection terminals 12.

Here, chemically stable AgSn is preferably used for the AgSn alloy to form the protection layer 13.

A thickness of the protection layer 13 is preferably from 3 μm to 100 μm. If the thickness of the protection layer 13 falls below 3 μm, such a protection layer 13 may contain a pin hole. This makes it difficult to completely cover a Cu electrode and thus Cu electromigration is not prevented sufficiently. On the other hand, if the thickness of the protection layer 13 exceeds 100 μm, such a protection layer 13 may reduce electric conductivity and adversely affect the electronic circuit.

Meanwhile, a circuit board 20 includes wiring (not depicted) formed into a given pattern, and connection terminals 22 (see FIG. 4). Each connection terminal 22 of the circuit board 20 is also made of Cu and a protection layer 23 made of an AgSn alloy is provided on a surface thereof. In addition, the connection terminal 12 of the electronic component 10 is bonded to the connection terminal 22 of the circuit board 20 by using solder 25. The solder 25 is made of a Sn-3.5 wt % Ag alloy, for example.

In this embodiment, the surfaces of the connection terminals 12 and 22 are covered with the protection layers 13 and 23 each made of a AgSn alloy as described above. Thus, electromigration may be suppressed. Reasons why the prevention is available will be described below.

Electromigration has a relation with a diffusion coefficient. To be more precise, an element having a greater diffusion coefficient is more likely to cause electromigration. The diffusion coefficient of Cu in Sn is equal to 2.4×10−11 m2/s while the diffusion coefficient of Ni in Sn is equal to 5.4×10−13 m2/s at 160° C. On the other hand, the diffusion coefficient of Ag in Sn is equal to 9.0×10−15 m2/s, which is smaller by four digits than that of Cu and by two digits than that of Ni. In other words, Ag in Sn is less likely to migrate upon application of a high-density current and less likely to generate atomic vacancies, which lead to electromigration, as compared to Cu or Ni.

Meanwhile, Sn in Ag has the diffusion coefficient which is almost the same as that of Ag. Moreover, since Sn is solid-solved in Ag in a temperature range equal to or below 160° C. For these reasons, an atomic vacancy generated by migration of Ag attributed to the current flowing between the contact terminals is buried with Sn. Accordingly, electromigration is even less likely to occur in this case.

As described above, in this embodiment, the surfaces of the connection terminals 12 and 22 are covered with the protection layers 13 and 23 each made of the AgSn alloy. Accordingly, even when the current flowing between the connection terminals 12 and 22 has a high current density, migration of the Cu atoms in the connection terminals 12 and 22 and migration of the Ag atoms in the protection layers 13 and 23 are suppressed, whereby electromigration is less likely to occur. In this way, problems such as an increase in a resistance value attributed to electromigration and occurrence of a wiring disconnection are avoided. As a consequence, the embodiment has an effect of improving reliability of a junction between the electronic component 10 and the circuit board 20.

As apparent from FIGS. 1A, 1B, 2A, and 2B, migration of the atoms attributed to electromigration occurs in the direction from the low-potential side (a cathode) to the high-potential side (an anode). Accordingly, the protection layer may only be provided on the connection terminals on the low-potential side without providing the protection layer on the connection terminals on the high-potential side.

Moreover, the solder 25 connecting the connection terminals 12 and 22 is not limited to the above-mentioned Sn-3.5 wt % Ag alloy but various other alloys (solder) including a Sn-0.7 wt % Cu alloy, a Sn-3 wt % Ag-0.5 wt % Cu alloy may be also applied.

Nevertheless, the solder 25 connecting between the connection terminals 12 and 22 is preferably made of an SnAg alloy containing Ag in a range from 2.0 wt % to 4.0 wt %. When the above-described SnAg alloy is used as the solder, this alloy has an effect of suppressing diffusion of the AgSn alloy in the protection layers 13 and 23 into the solder. Thus, a wiring disconnection between the connection terminals 12 and 22 attributable to electromigration may be suppressed more reliably.

Experiment 1

Some electronic components and circuit boards are soldered in accordance with the above-described method and then time to cause a wiring disconnection due to electromigration is investigated for each of the combinations of the electronic components and the circuit boards. Results are described below.

A pair of copper patterns each having a width of 100 μm and a height of 100 μm are formed on a glass epoxy substrate in such a manner that end surfaces of the patterns are opposed to each other. Then, the end surface of each of the copper patterns is plated with Ag in a thickness of 3 μm and is further plated with Sn in a thickness of 0.5 μm. Thereafter, the glass epoxy substrate is heated to a temperature of 250° C. to cause mutual diffusion of Ag and Sn, thereby forming protection layers containing Ag3Sn as a chief component. Then, a sample of Example is prepared by bonding the protection layers to each other using the Sn-3.5 wt % Ag alloy (the solder).

FIG. 5A is a view schematically depicting the sample of Example, in which reference numeral 31 denotes the copper pattern, reference numeral 32 denotes the protection layer (Ag3Sn), and reference numeral 33 denotes the solder (Sn-3.5 wt % Ag).

Meanwhile, as depicted in FIG. 5B, a sample similar to Example except that no protection layers 32 are provided is prepared as Comparative Example 1. Further, as depicted in FIG. 5C, a sample similar to Example except that Ni-plated layers 34 each having a thickness of 13 μm to 16 μm are formed instead of the protection layers 32 is prepared as Comparative Example 2.

In order to achieve uniform shapes of solder bonded portions, a resist film is formed so as to prevent the solder from adhering to portions other than the end surfaces of the copper patterns 31. In addition, a plurality of samples are prepared for each of Example and Comparative Examples 1 and 2.

Next, the samples of Example and Comparative Examples 1 and 2 are immersed in an oil bath maintained at a temperature of 160° C. in order to reduce temperature variations due to Joule heating associated with changes in resistance. Then, a direct current is applied from a constant current regulator to the samples of Example and Comparative Examples 1 and 2 in such a condition that a current density at a bonded interface between the solder and the copper pattern is equal to 2.5×104 A/cm2. Then, time to cause a wiring disconnection due to electromigration is measured for each of the samples.

FIG. 6 is a graph illustrating results of investigation of the time to cause wiring disconnections in the samples of Example and Comparative Examples 1 and 2. In this graph, the horizontal axis indicates the time to cause a wiring disconnection (fracture lifetime) and the vertical axis indicates a distribution function F. As apparent from FIG. 6, the fracture lifetime of the samples of Example is about three times as long as the fracture lifetime of the samples of Comparative Example 1 and about six times as long as the fracture lifetime of the samples of Comparative Example 2. The results of this experiment prove effectiveness of the embodiment.

In the above-described experiment, the end surfaces of the copper patterns are sequentially plated with Ag and Sn and are then subjected to thermal treatment to form the AgSn alloy. Nevertheless, similar results are also achieved in the case where the end surfaces of the copper patterns are directly plated with the AgSn alloy.

Experiment 2

An experiment is conducted for investigating relations between Ag contents in the protection layers and time to cause wiring disconnections due to electromigration. Results are described below.

Samples similar to the sample of Example in the above-described Experiment 1 (see FIG. 5A) are prepared by setting various Ag contents in the protection layers covering the end surfaces of the copper patterns. Then, a direct current at a current density of 2.5×104 A/cm2 is applied to each of the samples as similar to the procedures used for the samples of Example in Experiment 1. Then, time to cause a wiring disconnection is measured for each of the samples.

FIG. 7 is a graph illustrating results of investigation of relations between the Ag contents in the AgSn alloys and the time to cause wiring disconnections (fracture lifetime), in which the horizontal axis indicates the Ag contents in the AgSn alloys while the vertical axis indicates the time. As apparent from FIG. 7, the fracture lifetime is equal to or below 500 hours when the Ag content falls below 5 wt % or exceeds 95 wt %. The results of this experiment prove that the Ag content in each protection layer is preferably in a range from 10 wt % to 95 wt % inclusive.

In the embodiment, the description has been given of the case where the electronic components are the semiconductor device (an LSI) and the circuit board. Needless to say, the techniques disclosed above may be also applied to electronic components other than the semiconductor device, such as a chip resistor element or a capacitor element. In addition, though the description has been given of the case of bonding the semiconductor device to the circuit board in the embodiment, the embodiment may be also applied to a case of soldering semiconductor devices to each other.

All examples and conditional language recited herein are intended for the pedagogical purposes of aiding the reader in understanding the invention and the concepts contributed by the inventor to further the art, and are not to be construed as limitations to such specifically recited examples and conditions, nor does the organization of such examples in the specification relate to a showing of the superiority and inferiority of the invention. Although one or more embodiments of the present invention have been described in detail, it should be understood that the various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the invention.

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Citation

Patents Cited in This Cited by
Title Current Assignee Application Date Publication Date
錫-ビスマスはんだの接合方法 FUJITSU LTD 18 July 1996 13 February 1998
Composite lead wire and its production FURUKAWA ELECTRIC CO LTD,FURUKAWA METALS CO 12 October 1979 18 May 1981
改良されたはんだ接合を備えた半導体デバイス テキサス インスツルメンツ インコーポレイテッド 02 February 2007 16 July 2009
Semiconductor device with an improved solder joint TEXAS INSTRUMENTS INCORPORATED 03 February 2006 09 August 2007
半導体装置及びその製造方法 スパンション エルエルシー 16 May 2007 27 November 2008
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