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Patent Analysis of

Amplifier circuit and method of recovering input signal in the amplifier circuit

Updated Time 12 June 2019

Patent Registration Data

Publication Number

US10153732

Application Number

US15/364433

Application Date

30 November 2016

Publication Date

11 December 2018

Current Assignee

SAMSUNG ELECTRONICS CO., LTD.,KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

Original Assignee (Applicant)

SAMSUNG ELECTRONICS CO., LTD.,KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

International Classification

H03F1/36,H03F1/02,H03F3/45

Cooperative Classification

H03F1/0205,H03F3/45475,H03F2203/45526,H03F2203/45116

Inventor

JEON, INSU,LEE, JHINHWAN,SUH, HWANSOO

Patent Images

This patent contains figures and images illustrating the invention and its embodiment.

US10153732 Amplifier circuit 1 US10153732 Amplifier circuit 2 US10153732 Amplifier circuit 3
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Abstract

An amplifier circuit and a method of recovering an input signal in the amplifier circuit are provided. The amplifier circuit may recover an input signal by using a time constant and an output signal of a signal amplifier which is delayed by a certain period, based on characteristics of an inverse Laplace transform of a transfer function of the signal amplifier. A time required for recovering the input signal may be shorter than the time constant of the signal amplifier.

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Claims

1. An amplifier circuit for recovering an input signal, the amplifier circuit comprising:

a signal amplifier configured to amplify the input signal to generate an analog output signal; and a signal processor configured to receive the analog output signal from the signal amplifier, convert the analog output signal into a digital output signal, recover the input signal from the amplified input signal based on a transfer function of the signal amplifier that uses the digital output signal, a time constant of the signal amplifier, and a delayed signal of the digital output signal, and convert the recovered input signal into an analog input signal.

2. The amplifier circuit of claim 1, wherein the transfer function of the signal amplifier has a single pole.

3. The amplifier circuit of claim 1, wherein a time for the signal processor to recover the input signal is shorter than the time constant of the signal amplifier.

4. The amplifier circuit of claim 1, wherein the signal processor comprises:

a first signal converter configured to receive the analog output signal from the signal amplifier and to convert the received analog output signal into the digital output signal; and a signal recoverer configured to recover the input signal based on the time constant of the signal amplifier, the digital output signal, and the delayed signal of the digital output signal.

5. The amplifier circuit of claim 4, further comprising a second signal converter configured to receive the recovered input signal from the signal recoverer and convert the received recovered input signal into the analog input signal.

6. The amplifier circuit of claim 4, wherein, when the signal recoverer samples the digital output signal for a first period, and the digital output signal is delayed by an integer multiple of the first period.

7. The amplifier circuit of claim 1, wherein the signal amplifier comprises an operational amplifier, a resistor, and a capacitor.

8. The amplifier circuit of claim 1, wherein the input signal is a current signal ranging between an order of magnitude in nanoamperes (nA) and an order of magnitude in attoamperes (aA), and the analog output signal is a voltage signal.

9. The amplifier circuit of claim 1, wherein the signal processor is further configured to calculate a correction value by comparing the input signal with a preset threshold value.

10. The amplifier circuit of claim 1, wherein the signal processor is further configured to recover the input signal from the amplified input signal by removing an effect of the time constant of the signal amplifier from the amplified input signal.

11. A method of recovering an input signal in an amplifier circuit, the method comprising:

amplifying the input signal to generate an analog output signal; converting the analog output signal into a digital output signal; recovering the input signal from the amplified input signal, based on a transfer function that indicates a relationship between the input signal and the analog output signal and uses a time constant of the amplifier circuit and the digital output signal; and converting the recovered input signal into an analog input signal, wherein, in the recovering of the input signal, a delayed signal of the digital output signal is used for recovering the input signal.

12. The method of claim 11, wherein the transfer function has a single pole.

13. The method of claim 11, wherein, in the recovering of the input signal, a time required for recovering the input signal is shorter than the time constant.

14. The method of claim 11, wherein, in the recovering of the input signal, when the digital output signal is sampled for a first period, the digital output signal is delayed by an integer multiple of the first period.

15. The method of claim 14, wherein the input signal is obtained by subtracting the product of the delayed signal and a first variable from the digital output signal, and

the first variable is expressed by the time constant and an exponential function.

16. The method of claim 11, wherein the input signal is a current signal ranging between an order of magnitude in nanoamperes (nA) and an order of magnitude in attoamperes (aA), and the analog output signal is a voltage signal.

17. The method of claim 11, further comprising calculating a correction value by comparing the input signal with a preset threshold value.

18. The method of claim 11, wherein the recovering the input signal comprises recovering the input signal from the amplified input signal, by removing an effect of the time constant of the signal amplifier from the amplified input signal.

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Claim Tree

  • 1
    1. An amplifier circuit for recovering an input signal, the amplifier circuit comprising:
    • a signal amplifier configured to amplify the input signal to generate an analog output signal
    • and a signal processor configured to receive the analog output signal from the signal amplifier, convert the analog output signal into a digital output signal, recover the input signal from the amplified input signal based on a transfer function of the signal amplifier that uses the digital output signal, a time constant of the signal amplifier, and a delayed signal of the digital output signal, and convert the recovered input signal into an analog input signal.
    • 2. The amplifier circuit of claim 1, wherein
      • the transfer function of the signal amplifier has a single pole.
    • 3. The amplifier circuit of claim 1, wherein
      • a time for the signal processor to recover the input signal is shorter than the time constant of the signal amplifier.
    • 4. The amplifier circuit of claim 1, wherein
      • the signal processor comprises:
    • 7. The amplifier circuit of claim 1, wherein
      • the signal amplifier comprises
    • 8. The amplifier circuit of claim 1, wherein
      • the input signal is a current signal ranging between an order of magnitude in nanoamperes (nA) and an order of magnitude in attoamperes (aA), and the analog output signal is a voltage signal.
    • 9. The amplifier circuit of claim 1, wherein
      • the signal processor is further configured to calculate a correction value by comparing the input signal with a preset threshold value.
    • 10. The amplifier circuit of claim 1, wherein
      • the signal processor is further configured to recover the input signal from the amplified input signal by removing an effect of the time constant of the signal amplifier from the amplified input signal.
  • 11
    11. A method of recovering an input signal in an amplifier circuit, the method comprising:
    • amplifying the input signal to generate an analog output signal
    • converting the analog output signal into a digital output signal
    • recovering the input signal from the amplified input signal, based on a transfer function that indicates a relationship between the input signal and the analog output signal and uses a time constant of the amplifier circuit and the digital output signal
    • and converting the recovered input signal into an analog input signal, wherein, in the recovering of the input signal, a delayed signal of the digital output signal is used for recovering the input signal.
    • 12. The method of claim 11, wherein
      • the transfer function has a single pole.
    • 13. The method of claim 11, wherein
      • , in the recovering of the input signal, a time required for recovering the input signal is shorter than the time constant.
    • 14. The method of claim 11, wherein
      • , in the recovering of the input signal, when the digital output signal is sampled for a first period, the digital output signal is delayed by an integer multiple of the first period.
    • 16. The method of claim 11, wherein
      • the input signal is a current signal ranging between an order of magnitude in nanoamperes (nA) and an order of magnitude in attoamperes (aA), and the analog output signal is a voltage signal.
    • 17. The method of claim 11, further comprising
      • calculating a correction value by comparing the input signal with a preset threshold value.
    • 18. The method of claim 11, wherein
      • the recovering the input signal comprises
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Description

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the benefit of Korean Patent Application No. 10-2015-0169278, filed on Nov. 30, 2015 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety.

BACKGROUND

1. Field

Exemplary embodiments relate to amplifier circuits and methods of recovering an input signal in the amplifier circuits.

2. Description of the Related Art

An amplifier circuit amplifies an input signal and outputs an amplified signal. Examples of the amplifier circuit include a current amplifier circuit, a voltage amplifier circuit, and a current/voltage conversion amplifier circuit, which are classified according to a type of an input/output signal. Specifically, since the current/voltage conversion amplifier circuit receives a small current signal and converts the received small current signal into a voltage signal having a similar waveform to the small current signal, the current/voltage conversion amplifier circuit has been applied to various fields, such as a scanning tunneling microscope, a photoelectric amplifier, an ion detector, and a mass spectrometer.

However, when an amplified signal is output, a response delay may occur according to components included in the amplifier circuit. The response delay may vary according to a time taken until a signal reaches a normal state after the signal is input to the amplifier circuit. The response delay may lead to a delay in generating an output signal corresponding to the input signal, and may result in performance degradation of a feedback circuit.

SUMMARY

Exemplary embodiments address at least the above problems and/or disadvantages and other disadvantages not described above. Also, the exemplary embodiments are not required to overcome the disadvantages described above, and may not overcome any of the problems described above.

One or more exemplary embodiments provide methods of recovering an input signal having a removed response delay from an output signal of an amplifier circuit.

According to an aspect of an exemplary embodiment, there is provided an amplifier circuit for recovering an input signal includes: a signal amplifier configured to amplify the input signal to generate an analog output signal; and a signal processor configured to convert the analog output signal into a digital output signal and recover the input signal based on a transfer function of the signal amplifier that uses the digital output signal and a time constant of the signal amplifier.

The transfer function of the signal amplifier may have a single pole.

A time required for the signal processor to recover the input signal may be shorter than the time constant of the signal amplifier.

The signal processor may include: a first signal converter configured to receive the analog output signal from the signal amplifier and convert the received analog output signal into the digital output signal; and a signal recoverer configured to recover the input signal based on the time constant of the signal amplifier, the digital output signal, and a delayed signal of the digital output signal.

The amplifier circuit may further include a second signal converter configured to receive the recovered input signal from the signal recoverer and convert the received recovered input signal into an analog input signal.

When the signal recoverer samples the digital output signal for a first period, the digital output signal may be delayed by an integer multiple of the first period.

The signal amplifier may include an operational amplifier, a resistor, and a capacitor.

The input signal may be a current signal ranging between an order of magnitude in nanoamperes (nA) and an order of magnitude in attoamperes (aA), and the analog output signal may be a voltage signal.

The amplifier circuit may further include a feedback calculator configured to calculate a correction value by comparing the input signal with a preset threshold value.

The time constant of the signal amplifier may be in a range of about 1 μs to about 1 ms, and the first period is in a range of about 10 kHz to about 10 MHz.

According to an aspect of another exemplary embodiment, there is provided a method of recovering an input signal in an amplifier circuit includes: amplifying the input signal to generate an analog output signal; converting the analog output signal into a digital output signal; and recovering the input signal based on a transfer function that indicates a relationship between the input signal and the analog output signal and uses a time constant and the digital output signal.

The transfer function may have a single pole.

In the recovering of the input signal, a time required for recovering the input signal may be shorter than the time constant.

The method may further include converting the recovered input signal into an analog input signal.

In the recovering of the input signal, a delayed signal of the digital output signal may be used for recovering the input signal.

In the recovering of the input signal, when the digital output signal is sampled for a first period, the digital output signal may be delayed by an integer multiple of the first period.

The input signal may be obtained by subtracting the product of the delayed signal and a first variable from the digital output signal, and the first variable may be expressed by the time constant and an exponential function.

The input signal may be a current signal ranging between an order of magnitude in nanoamperes (nA) and an order of magnitude in attoamperes (aA), and the analog output signal may be a voltage signal.

The method may further include calculating a correction value by comparing the input signal with a preset threshold value.

The time constant may be in a range of about 1 μs to about 1 ms, and the first period may be in a range of about 10 kHz to about 10 MHz.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and/or other aspects will be more apparent by describing certain exemplary embodiments, with reference to the accompanying drawings, in which:

FIG. 1 is a graph showing an input function and an output function of a signal amplifier in a time domain;

FIG. 2 is a block diagram of an amplifier circuit for recovering an input signal, according to an exemplary embodiment;

FIG. 3 is a block diagram of an amplifier circuit for recovering an input signal, according to another exemplary embodiment;

FIG. 4A is a circuit diagram of a signal amplifier according to an exemplary embodiment;

FIG. 4B is a circuit diagram of an ideal operational amplifier;

FIG. 4C is a circuit diagram of a signal amplifier according to another exemplary embodiment;

FIG. 5A is a block diagram of an amplifier circuit for recovering an input signal by using an output signal delayed by a sampling period (Ts), according to an exemplary embodiment;

FIG. 5B is a block diagram of an amplifier circuit for recovering an input signal by using an output signal delayed by an integer multiple of a sampling period (Ts), according to another exemplary embodiment;

FIG. 6 is a block diagram of an amplifier circuit for recovering an input signal, according to another exemplary embodiment;

FIG. 7 is a graph showing an input signal and an output signal including a noise signal, according to an exemplary embodiment;

FIG. 8A is a graph showing a result obtained by recovering an input signal by using an output signal when a coefficient (γ) of a delayed output signal is

e-Tτ,

according to an exemplary embodiment;

FIG. 8B is a graph showing a result obtained by recovering an input signal by using an output signal when a coefficient (γ) of a delayed output signal is less than

e-Tτ,

according to another exemplary embodiment;

FIG. 8C is a graph showing a result obtained by recovering an input signal by using an output signal when a coefficient (γ) of a delayed output signal is greater than

e-Tτ,

according to another exemplary embodiment;

FIG. 9 is a flowchart of a method of recovering an input signal in an amplifier circuit, according to an exemplary embodiment; and

FIG. 10 is a flowchart of a method of recovering an input signal in an amplifier circuit, according to another exemplary embodiment.

DETAILED DESCRIPTION

Exemplary embodiments are described in greater detail below with reference to the accompanying drawings.

In the following description, like drawing reference numerals are used for like elements, even in different drawings. The matters defined in the description, such as detailed construction and elements, are provided to assist in a comprehensive understanding of the exemplary embodiments. However, it is apparent that the exemplary embodiments can be practiced without those specifically defined matters. Also, well-known functions or constructions are not described in detail since they would obscure the description with unnecessary detail

It will be understood that when a region is referred to as being “connected to” or “coupled to” another region, it may be directly connected or coupled to the other region or intervening regions may be present. It will also be understood that the terms “comprises”, “includes”, and “has”, when used herein, specify the presence of stated elements, but do not preclude the presence or addition of other elements, unless otherwise defined. Also, the terms “unit” and “module” used herein represent a unit for processing at least one function or operation, which may be implemented by hardware, software, or a combination of hardware and software.

The terms “comprises”, “includes”, and “has” should not be construed as necessarily including elements or operations described in the present disclosure and will be construed as not including some of the elements or operations or further including additional elements or operations.

In the following exemplary embodiments, a small-letter function represents a function in a time domain, and a capital-letter function represents a function in an s domain (complex frequency domain). For example, a voltage input signal vI represents a voltage input signal vI(t) in a time domain, and a voltage input signal VI represents a voltage input signal VI(s) in an s domain.

FIG. 1 is a graph showing an input function and an output function of a signal amplifier in a time domain.

An output signal 120 illustrated in FIG. 1 may be a signal from which an amplification gain of the signal amplifier is removed. An amplitude of the output signal 120 may be similar to an amplitude of an input signal 110. However, due to a response delay of the signal amplifier, a time delay occurs until the input signal 110 is outputted as the output signal 120. The response delay may vary according to a time constant of the signal amplifier. The time constant may mean a time taken until the output signal 120 reaches a normal state after the signal amplifier operates. The time constant may vary according to components of the signal amplifier.

For example, in the case of a first-order signal amplifier including a resistor and a capacitor, a time constant is equal to the product of a resistance and a capacitance. Therefore, when the first-order signal amplifier has a large resistance and a large capacitance, a time constant thereof may increase, resulting in an increase in a response delay. On the other hand, in the case of a first-order signal amplifier including a resistor and an inductor, a time constant is equal to the division of an inductance over a resistance. Therefore, when the first-order signal amplifier has a large inductance and a small resistance, a time constant thereof may increase, resulting in an increase in a response delay.

As a signal amplifier, a micro current/voltage conversion amplifier is configured to receive a current signal ranging between nanoampere (nA) and attoampere (aA) and output a voltage signal having a waveform similar to the current signal. Since the micro current/voltage conversion amplifier has a large time constant, it takes a long time until the output voltage signal reaches a normal state. In particular, if it takes a long time until the output voltage signal reaches the normal state, a delay time between an output signal and an input signal increases, causing performance degradation of a circuit for feeding back the input signal according to the output signal. Therefore, there may be a need for a method of providing a signal having an improved response delay in an amplifier circuit.

FIG. 2 is a block diagram of an amplifier circuit for recovering an input signal, according to an exemplary embodiment.

Referring to FIG. 2, the amplifier circuit 200 for recovering the input signal may include a signal amplifier 210 and a signal processor 220. Examples of the amplifier circuit 200 may include a broadband amplifier circuit for acquiring a uniform amplification factor in a broad frequency band, a narrowband amplifier circuit using a tuner circuit including an inductor and a capacitor connected in parallel to each other, and a direct current (DC) amplifier circuit for low frequency amplification, but are not limited thereto.

In addition, the amplifier circuit 200 may amplify the input signal vI and output an amplified signal as an output signal vO and may recover the input signal vI from the output signal vO. Furthermore, the amplifier circuit 200 may calculate a correction value by recovering the input signal vI corresponding to the output signal vO and comparing the recovered input signal with a preset threshold value.

While both the input signal vI and the output signal vO are illustrated as voltages in FIG. 2, it will be understood by those of ordinary skill in the art that the input signal vI and the output signal vO may be different types of signals, such as a current signal and a power signal.

Referring to FIG. 2, the signal amplifier 210 may amplify the input signal vI and output the amplified signal as the output signal vO.

For example, the signal amplifier 210 may be a micro current/voltage conversion amplifier configured to receive a current signal ranging between nanoampere (nA) and attoampere (aA) and output an amplified voltage signal as an output signal. Since the micro current/voltage conversion amplifier may receive a small current signal and output a voltage signal having a waveform similar to the small current signal, the micro current/voltage conversion amplifier circuit may be applied to various fields including various measurement devices. Specifically, examples of the measurement devices including the micro current/voltage conversion amplifier may include a scanning tunneling microscope (STM) for determining a structure of a sample from a tunneling phenomenon caused by electrons, a photoelectric amplifier for measuring light, an ion detector, and a mass spectrometer, but are not limited thereto.

In addition, the signal amplifier 210 may be a first-order circuit. The first-order circuit may refer to a circuit of which a relationship between an input signal and an output signal is expressed by a first-order differential equation. Examples of the first-order circuit may include an RL circuit implemented by a resistor and an inductor and an RC circuit implemented by a resistor and a capacitor.

Characteristics of the signal amplifier 210 may be analyzed by using a transfer function H(s) thereof. The transfer function H(s) of the signal amplifier 210 may be defined as a ratio of an s-domain output signal to an s-domain input signal as follows.

H(s)=VO(s)VI(s)[MathematicalEquation1]

In Mathematical Equation 1, VO(s) and VI(s) respectively denote an output signal and an input signal in an s domain. The s domain is a complex frequency domain that may be used instead of a time domain when a differential equation is solved based on a Laplace transform. Specifically, the Laplace transform is an integral transform for solving a differential equation. The Laplace transform is widely used for solving a simultaneous equation or a differential equation and is widely used in engineering fields including electronics.

It may be determined through the transfer function H(s) whether the signal amplifier 210 corresponds to a single-pole amplifier. The single-pole amplifier refers to an amplifier of which a transfer function H(s) has a single pole. That is, the single-pole amplifier may be defined as an amplifier of which a transfer function H(s) has a single s that makes a denominator of the transfer function H(s) be zero. In the singe-pole amplifier, an output signal does not oscillate and reaches a normal state after a certain time has passed. Therefore, the single-pole amplifier may be applied to an amplifier circuit configured to amplify a signal and output an amplified signal.

In addition, the signal processor 220 of the amplifier circuit 200 may receive the output signal of the signal amplifier 210 and recover the input signal from the output signal of the signal amplifier 210. The signal processor 220 will be described below in detail with reference to the accompanying drawings.

FIG. 3 is a block diagram of an amplifier circuit for recovering an input signal vI(t), according to another exemplary embodiment.

Referring to FIG. 3, the amplifier circuit 300 for recovering the input signal vI(t) may include a signal amplifier 310 and a signal processor 320. The signal processor 320 may include a first signal converter 321 and a signal recoverer 322. Since the signal amplifier 310 corresponds to the signal amplifier 210 of FIG. 2, detailed descriptions thereof will be omitted.

The first signal converter 321 may receive an analog output signal from the signal amplifier 310 and convert the received analog output signal into a digital output signal.

The signal recoverer 322 may recover a digital input signal by using a time constant of the signal amplifier 310, the digital output signal, and a delayed signal of the digital output signal (hereinafter, referred to as a delayed digital output signal). Referring to FIG. 3, when the input signal vI(t) is input to the amplifier circuit 300, the amplifier circuit 300 outputs an amplified output signal vO(t) and a recovered input signal

vI(t-T2-τ).

In addition, the signal processor 320 may further include a second signal converter configured to receive the digital input signal from the signal recoverer 322 and convert the received digital input signal into an analog input signal. The second signal converter will be described below in detail with reference to the accompanying drawings.

FIG. 4A is a circuit diagram of a signal amplifier according to an exemplary embodiment.

Referring to FIG. 4A, the signal amplifier 410 may include an operational amplifier 420, a resistor having a resistance RF, and a capacitor having a capacitance of CF. The operational amplifier 420 may receive a voltage signal vI(t) as an input signal and output a voltage signal vO(t) as an output signal. Assuming that the operational amplifier 420 is an ideal operational amplifier, the output signal vO(t) may be calculated by performing a Laplace transform on the input signal vI(t), the resistance RF, and the capacitance CF.

FIG. 4B is a circuit diagram of an ideal operational amplifier.

Referring to FIG. 4B, an open-loop gain A of the ideal operational amplifier 430 is infinite. An open-loop gain of a real operational amplifier may be about several ten thousands to about several millions, but is not limited thereto.

An input impedance RI of the ideal operational amplifier 430 is infinite. That is, the infinite input impedance RI means an open circuit. Therefore, a current flowing into the ideal operational amplifier 430 is substantially 0 A. An input impedance of the real operational amplifier may be in a range of about 1Ω to about 1,000Ω according to a type of an operational amplifier, but is not limited thereto.

An output impedance RO of the ideal operational amplifier 430 is substantially 0Ω. This means that an output signal vO(t) of the ideal operational amplifier 430 is all transferred to a load regardless of the resistant value of the load. An output impedance of the real operational amplifier may be in a range of about 35Ω to about 100Ω, but is not limited thereto.

Therefore, when the operational amplifier 420 of FIG. 4A is substantially the same as the ideal operational amplifier 430 of FIG. 4B, a Laplace transform equation VO(s) of the output signal vO(t) may be expressed as follows.

VO(s)=H(s)×VI(s)=-RFRJ11+sRFCFVI(s)[MathematicalEquation2]

In Mathematical Equation 2, H(s) is a transfer function and s is a complex frequency. When the signal amplifier 410 is a first-order RC circuit including a resistor having a resistance RF and a capacitor having a capacitance CF, as illustrated in FIG. 4A, a time constant t of the signal amplifier 410 may be expressed as follows.

τ=RF×CF [sec]  [Mathematical Equation 3]

For example, when RF is 109[Ω] and CF is 0.1 [pF], the time constant τ is equal to 10−4 [sec]. This means that it takes 10−4 seconds until the output signal vO(t) increases up to 63% of a maximum output signal.

FIG. 4C is a circuit diagram of a signal amplifier according to another exemplary embodiment.

Referring to FIG. 4C, the signal amplifier 410 may receive an input current signal iI(t) as an input signal. It is assumed that the input current signal iI(t) satisfies the following relationship: iI(t)=vI(t)/RJ [A], where vI(t) and RJ are respectively the input voltage signal and an input resistance of the signal amplifier 410 illustrated in FIG. 4A. In this case, when the input current signal iI(t) is input, it may be possible to obtain substantially the same output signal vO(t) as that of FIG. 4A. Therefore, an amplifier circuit, which includes the signal amplifier 410 receiving the input current signal as the input signal, may be defined as a current/voltage conversion amplifier circuit.

Referring to Mathematical Equation 3, a transfer function H(s) of a first-order single-pole amplifier including a resistor and a capacitor may be expressed by

-RFRJ11+sRFCF.

Therefore, an inverse Laplace transform of the transfer function H(s) may be expressed as follows.

vO(t)=L-1[VO(s)]=L-1[H(s)VI(s)]=0th(t)·vI(t-t)dt=-RFRJ-dt[e-tττu(t)]vI(t-t)[MathematicalEquation4]

Assuming that the voltage signal vO(t) is a function of a time t and a recovered input signal vI(t′) is a function of a time t′, a relationship between the time t and the time t′ may be established as t′≤t. That is, since the recovered input voltage signal vI(t′) is obtained by using the output signal vO(t), the time t of the output signal vO(t) may be always equal to or preceded by the time t′ of the input signal vI(t′).

In addition, u(t′) is a step function and τ is a time constant. RF and RJ are respectively a resistance and the input resistance of the signal amplifier 410. Since the step function u(t′) is always 1 for t′≥0, the output signal vO(t) may be expressed as follows.

vO(t)=-RFRJ0dte-tττvI(t-t)[MathematicalEquation5]

In addition, by using Mathematical Equation 5, a delayed output signal vO(t−T) delayed by a delay time T may be expressed as follows.

[MathematicalEquation6]vO(t-T)=-RFRJ0dte-tττvI(t-T-t)=-RFRJ-Tτ0dte-tττvI(t-t),

In this case, t″ is equal to T+t′. When a relationship between the time constant τ and the delay time T is T<<τ, the following equation with respect to

vI(t-T2)

may be obtained by subtracting the product of vO(t−T) of Mathematical Equation 6 and

e-Tτ

from the output value vO(t) of Mathematical Formula 5.

[MathematicalEquation7]vO(t)-e-TτvO(t-T)=-RFRJ0Tdte-tττvI(t-t)-RFRJτvI(t-T2)T

Referring to Mathematical Equation 7, in order to accurately recover an input signal vI(t−t′), it may be necessary to solve an integral equation, for example, based on a Richardson-Lucy algorithm. However, the Richardson-Lucy algorithm needs to perform several iterations. Thus, when it is necessary to recover an input signal in real time, it may be difficult to apply the Richardson-Lucy algorithm. Therefore, based on the relationship T<<τ between the time constant τ and the delay time T, it may be possible to deduce the following approximate expression

vO(t)-e-TτvO(t-T)ofvI(t-T2).vI(t-T2)-RJτRFvO(t)-e-TτvO(t-T)T[MathematicalEquation8]

The delay time T may denote a sampling period of the signal processor 320. Referring to Mathematical Equation 8, the input signal

vI(t-T2)

delayed by T/2 may be recovered by using the time constant τ, the output signal vO(t), the sampling period T, and the delayed output signal vO(t−T) delayed by the sampling period T.

That is, since the recovered input signal

vI(t-T2)

is a function of a time delayed by T/2 from t and the sampling period T is much smaller than the time constant τ, it may be considered that a time constant effect of the output signal vO(t) is removed, as compared with the recovered input voltage signal

vI(t-T2).

When a coefficient

-RJτRFT,

which determines an amplitude of the recovered input signal

vI(t-T2),

is removed from Mathematical Equation 8, the recovered input signal

vI(t-T2)

may be expressed as follows.

vI(t-T2)vO(t)-e-TτvO(t-T)=vO(t)-γ·vO(t-T)[MathematicalEquation9]

Therefore, the signal recoverer 322 may recover the input signal

vI(t-T2)

by using Mathematical Equation 9. In addition, the recovered input signal

vI(t-T2)

may vary according to a coefficient γ of the delayed output signal vO(t−T).

A delay time of the input signal recovered by the real amplifier circuit 300 may be

T2+τ.

That is, when recovering the input signal, the signal processor 320 needs to take into consideration the delay caused by the time constant τ. However, since the time constant τ may be predetermined according to components of the signal amplifier 310,

vI(t-T2-τ)

may be simply calculated by using the recovered input signal

vI(t-T2).

In addition, performance analysis results obtained when the coefficient

-RJτRFT,

which determines an amplitude of each of an output function vO and a recovered input function vI, is removed, are described in the following exemplary embodiments. However, it will be understood by those of ordinary skill in the art that an amplitude ratio of an output signal to an input signal may be equal to or less than about 1.

FIGS. 5A and 5B are block diagrams of amplifier circuits for recovering an input signal by using output signals delayed by different delay times, according to exemplary embodiments.

FIG. 5A is a block diagram of an amplifier circuit for recovering an input signal by using an output signal delayed by a sampling period Ts, according to an exemplary embodiment.

Referring to FIG. 5A, a signal processor 510 may include a first signal converter 511 and a signal recoverer 512. The first signal converter 511 may convert an analog output signal into a digital output signal based on the sampling period TS. The signal recoverer 512 may receive the digital output signal, extract an n-th component vO(nTS), and extract a delayed digital output signal vO((n−1)TS) delayed by the sampling period TS. The signal recoverer 512 may recover the input signal by multiplying the delayed digital output signal vO((n−1)TS) by

-e-Tsτ

and adding the multiplication result to the n-th component vO(nTS) of the digital output signal. At this time, it may be considered that a time required for the signal processor 510 to recover the input signal is the sum of a time required for the first signal converter 511 to convert the analog output signal into the digital output signal and a time required for the signal recoverer 512 to extract an output signal and perform a calculation. When the sampling period TS is substantially the same as the delay time T of the delayed output signal, the time spent in the first signal converter 511 may be shorter than the time constant τ because the relationship between the sampling period TS and the time constant τ of the signal amplifier 310 is assumed to be TS<<τ in Mathematical Equation 7. In addition, since the signal recoverer 512 extracts the output signal and performs a simple calculation, the time required for the signal processor 510 to recover the input signal may be shorter than the time constant τ.

FIG. 5B is a block diagram of an amplifier circuit for recovering an input signal by using a delayed output signal delayed by an integer multiple of a sampling period TS, according to another exemplary embodiment.

A signal processor 520 may recover the input signal by using the delayed output signal delayed by the integer multiple of the sampling period TS. That is, a delay time of the delayed output signal may be mTS.

Referring to FIG. 5B, after a signal recoverer 522 extracts an n-th component of a digital output signal received from a first signal converter 521, the signal recoverer 522 may extract a delayed output signal vO(nTS−mTS) delayed by m times from an n-th output signal vO(nTS). The delayed output signal vO(nTS−mTS) delayed by m times from the n-th output signal vO(nTS) will be referred to as an m-th delayed output signal. A recovered input signal

vI(t-T2)

may be obtained by multiplying the m-th delayed output signal vO(nTS−mTS) by

-e-mTsτ

and adding the multiplication result to the n-the output signal vO(nTS).

At this time, a delay time of the input signal recovered by the real signal processor 520 is

T2+τ.

That is, when recovering the input signal, the signal processor 520 needs to take into consideration a delay caused by the time constant τ. However, since the time constant τ may be predetermined according to a component of the signal amplifier 310, it will be understood by those of ordinary skill in the art that

vI(t-T2-τ)

is simply calculated by using the recovered input signal

vI(t-T2).

FIG. 6 is a block diagram of an amplifier circuit for recovering an input signal, according to another exemplary embodiment.

Referring to FIG. 6, a signal processor 610 may include a first signal converter 611, a signal recoverer 612, and a second signal converter 613. The second signal converter 613 may receive a digital output signal

vI(t-T2-τ)

from the signal recoverer 612 and convert the received digital output signal

vI(t-T2-τ)

into an analog output signal

vI(t-T2-τ).

Since the first signal converter 611 corresponds to the first signal converter 511 of FIG. 5A, detailed descriptions thereof will be omitted.

In addition, the signal recoverer 612 is illustrated in FIG. 6 as being substantially the same as the signal recoverer 512 of FIG. 5A, but the signal recoverer 612 may be substantially the same as the signal recoverer 522 of FIG. 5B.

FIG. 7 is a graph showing an input signal and an output signal including a noise signal, according to an exemplary embodiment.

When the input signal 710 is input to the signal amplifier 310 of FIG. 3, the signal amplifier 310 may output the output signal ({tilde over (v)}0(t)) 720 including the noise signal (n(t)). Referring to FIG. 7, the output signal ({tilde over (v)}0(t)) 720 of the signal amplifier 310 is a signal from which an amplitude component is removed. The output signal ({tilde over (v)}0(t)) 720 of the signal amplifier 310 is illustrated as having an amplitude similar to the input signal 710, but it will be understood by those of ordinary skill in the art that an amplitude ratio of the output signal ({tilde over (v)}0(t)) 720 to the input signal 710 may be equal to or less than about 1.

In addition, the output signal ({tilde over (v)}0(t)) 720 amplified by the signal amplifier 310 may include an output signal (vO(t)) and the noise signal (n(t)). At this time, in order to perform a performance analysis of the amplifier circuit 300, it was assumed that the noise signal (n(t)) was a signal having a constant power spectrum density throughout all frequencies and was additive white Gaussian noise having a Gaussian distribution on a time axis. Referring to FIG. 7, a response delay may occur in the output signal 720 according to a time constant effect of the signal amplifier 310 as illustrated in FIG. 1.

FIGS. 8A to 8C are graphs showing results obtained by comparing an input signal of the signal amplifier 310 with an input signal recovered according to a coefficient γ of a delayed output signal v0(t−T) with reference to FIG. 9.

FIG. 8A is a graph showing a result obtained by recovering an input signal by using an output signal when a coefficient (γ) of a delayed output signal is

e-Tτ,

according to an exemplary embodiment;

Specifically, FIG. 8A is a graph showing a result obtained by comparing the input signal 710 input to the signal amplifier 310 with an input signal 810 recovered by using the output signal ({tilde over (v)}0(t)) 720 including the noise signal (n(t)) of FIG. 7. That is, when the coefficient (γ) of the delayed output signal (vO(t−T) is

e-Tτ,

it may be possible to recover an input signal similar to the input signal 710 input to the signal amplifier 310.

FIG. 8B is a graph showing a result obtained by recovering an input signal by using an output signal when the coefficient γ of a delayed output signal is less than

e-Tτ,

according to another exemplary embodiment.

FIG. 8C is a graph showing a result obtained by recovering an input signal by using an output signal when the coefficient γ of the delayed output signal is greater than

e-Tτ,

according to another exemplary embodiment.

As illustrated in FIGS. 8B and 8C, when the coefficient γ of the delayed output signal vO(t−T) is not equal to

e-Tτ,

a greater difference may occur between the input signal 710 and the recovered input signals 820 and 830.

FIG. 9 is a flowchart of a method of recovering an input signal in the amplifier circuit, according to an exemplary embodiment.

In operation 910, the signal amplifier 310 may amplify an input signal to generate an analog output signal having a single-pole delay. The input signal may be a current signal ranging between nanoampere (nA) and attoampere (aA), and the analog output signal may be a voltage signal.

In operation 920, the first signal converter 321 of the signal processor 320 may convert the analog output signal into a digital output signal. The first signal converter 321 may sample the analogue output signal according to the sampling period TS. The sampling period TS is assumed to be shorter than the time constant τ of the signal amplifier 310.

For example, an STM for determining a structure of a sample may measure an actual spatial image of a surface at a resolution of an atomic level. The STM may inject electrons into a sample surface by using a scan-type sharp conductive tip and determine the structure of the sample by using a tunneling phenomenon caused by the electrons. Since the STM uses a tunneling current signal or a bias voltage, the STM may include a micro current/voltage conversion amplifier. Since the micro current/voltage conversion amplifier included in the STM has a time constant τ of about 1 μs to about 1 ms, a sampling period TS may be in a range of about 10 kHz to about 10 MHz.

In operation 930, the signal recoverer 322 of the signal processor 320 may recover an input signal

vI(t-T2)

by using the time constant and the digital output signal based on characteristics of the transfer function H(s) with respect to the input signal and the analog output signal. For example, in the case of a first-order amplifier having a single pole, an inverse Laplace transform of the transfer function H(s) may be expressed by the product of an exponential function

e-tττ

and a step function u(t′). The exponential function

e-tττ

has a peak value of 1 when f=0 and decreases from the peak value of 1 as t′ increases, and the step function u(t′) is maintained at 1 when t′≥0. Therefore, the input signal

vI(t-T2)

may be recovered by using an output signal vO(t) and a delayed output signal vO(t−T) based on the above-described characteristics. The signal processor 320 may not need to perform iterative calculations, and therefore may recover the input signal in a shorter time than the time constant τ of the signal amplifier 310.

At this time, the delay time of the input signal recovered by the real signal processor 320 is

T2+τ.

That is, when recovering the input signal, the signal processor 320 may need to take into consideration the delay caused by the time constant τ. However, since the time constant τ may be predetermined according to components of the signal amplifier 310,

vI(t-T2-τ)

may be simply calculated by using the recovered input signal

vI(t-T2).

Therefore, the input signal may be recovered in real time, and the output signal having a removed response delay may be obtained by comparing the input signal with the recovered input signal.

The delay time T of the delayed output signal may be an integer multiple of the sampling period TS of the signal processor 320.

FIG. 10 is a flowchart of a method of recovering an input signal in the amplifier circuit, according to another exemplary embodiment.

Since operation 1010 corresponds to operation 910 of FIG. 9, detailed descriptions thereof will be omitted.

In operation 1020, the first signal converter 521 may convert the analog output signal vO′(t) into a digital output signal vO(t) based on a sampling period TS.

In operation 1030, the signal recoverer 522 may extract an n-th output signal vO(nTS) and an m-th delayed output signal vO(nTS−mTS) delayed by m times from the n-th output signal vO(nTS). At this time, n and m are integers.

In operation 1040, the signal recoverer 522 may recover a digital input signal

vI(t-T2)

by multiplying the m-th delayed output signal vO(nTS−mTS) by a coefficient

-e-mTsτ

and adding the multiplication result to the n-th output signal vO(nTS). When recovering the input signal, the real signal processor 320 needs to take into consideration the delay caused by the time constant τ. The time constant τ may be predetermined according to components of the signal amplifier 310. Therefore,

vI(t-T2-τ)

may be simply calculated by using the recovered digital input signal

vI(t-T2).

In operation 1050, the second signal converter 613 may convert the recovered digital input signal

vI(t-T2-τ)

into an analog input signal

vI(t-T2-τ).

Operation 1050 may be performed when the analog input signal is required, but is not limited thereto.

In operation 1060, the signal processor 520 may calculate a correction value by comparing the digital input signal with a preset threshold value.

For example, the STM may operate in a constant height mode or a constant current mode. The constant current mode may mean a mode of maintaining a tunneling current constant by adjusting a scanner height according to a feedback at each measurement point. When the STM is in the constant current mode, an amplifier circuit included in the STM needs to maintain a current input signal constant. At this time, a correction value for maintaining a constant current may be calculated by using an input signal and an output signal having a removed response delay.

As described above, it may be possible to improve the response delay by recovering the input signal from which the time constant effect of the signal amplifier is removed through a simple calculation.

While not restricted thereto, an exemplary embodiment can be embodied as computer-readable code on a computer-readable recording medium. The computer-readable recording medium is any data storage device that can store data that can be thereafter read by a computer system. Examples of the computer-readable recording medium include read-only memory (ROM), random-access memory (RAM), CD-ROMs, magnetic tapes, floppy disks, and optical data storage devices. The computer-readable recording medium can also be distributed over network-coupled computer systems so that the computer-readable code is stored and executed in a distributed fashion. Also, an exemplary embodiment may be written as a computer program transmitted over a computer-readable transmission medium, such as a carrier wave, and received and implemented in general-use or special-purpose digital computers that execute the programs. Moreover, it is understood that in exemplary embodiments, one or more units of the above-described apparatuses and devices can include circuitry, a processor, a microprocessor, etc., and may execute a computer program stored in a computer-readable medium.

The foregoing exemplary embodiments are merely exemplary and are not to be construed as limiting. The present teaching can be readily applied to other types of apparatuses. Also, the description of the exemplary embodiments is intended to be illustrative, and not to limit the scope of the claims, and many alternatives, modifications, and variations will be apparent to those skilled in the art.

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Citation

Patents Cited in This Cited by
Title Current Assignee Application Date Publication Date
Adding a laplace transform zero to linear integrated circuit for frequency stability MICREL, INCORPORATED 07 September 2001 18 July 2002
Analog circuit having improved response time SAMSUNG ELECTRO-MECHANICS CO., LTD. 13 July 2010 31 July 2012
Amplifier and communication apparatus KABUSHIKI KAISHA TOSHIBA 08 September 2010 08 September 2011
High performance CMOS radio frequency receiver NORTH STAR INNOVATIONS INC. 29 January 2008 30 July 2009
Amplifier circuit for adding a laplace transform zero in a linear integrated circuit MICREL, INC. 31 July 2002 18 May 2004
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